f75ef9e44f
just em, there is an igb driver (this follows behavior with our Linux drivers). All adapters up to the 82575 are supported in em, and new client/desktop support will continue to be in that adapter. The igb driver is for new server NICs like the 82575 and its followons. Advanced features for virtualization and performance will be in this driver. Also, both drivers now have shared code that is up to the latest we have released. Some stylistic changes as well. Enjoy :)
391 lines
11 KiB
C
391 lines
11 KiB
C
/******************************************************************************
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Copyright (c) 2001-2008, Intel Corporation
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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3. Neither the name of the Intel Corporation nor the names of its
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contributors may be used to endorse or promote products derived from
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this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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******************************************************************************/
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/*$FreeBSD$*/
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#include "e1000_api.h"
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#include "e1000_manage.h"
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static u8 e1000_calculate_checksum(u8 *buffer, u32 length);
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/**
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* e1000_calculate_checksum - Calculate checksum for buffer
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* @buffer: pointer to EEPROM
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* @length: size of EEPROM to calculate a checksum for
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*
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* Calculates the checksum for some buffer on a specified length. The
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* checksum calculated is returned.
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**/
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static u8 e1000_calculate_checksum(u8 *buffer, u32 length)
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{
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u32 i;
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u8 sum = 0;
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DEBUGFUNC("e1000_calculate_checksum");
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if (!buffer)
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return 0;
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for (i = 0; i < length; i++)
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sum += buffer[i];
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return (u8) (0 - sum);
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}
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/**
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* e1000_mng_enable_host_if_generic - Checks host interface is enabled
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* @hw: pointer to the HW structure
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*
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* Returns E1000_success upon success, else E1000_ERR_HOST_INTERFACE_COMMAND
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*
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* This function checks whether the HOST IF is enabled for command operation
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* and also checks whether the previous command is completed. It busy waits
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* in case of previous command is not completed.
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**/
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s32 e1000_mng_enable_host_if_generic(struct e1000_hw * hw)
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{
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u32 hicr;
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s32 ret_val = E1000_SUCCESS;
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u8 i;
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DEBUGFUNC("e1000_mng_enable_host_if_generic");
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/* Check that the host interface is enabled. */
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hicr = E1000_READ_REG(hw, E1000_HICR);
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if ((hicr & E1000_HICR_EN) == 0) {
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DEBUGOUT("E1000_HOST_EN bit disabled.\n");
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ret_val = -E1000_ERR_HOST_INTERFACE_COMMAND;
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goto out;
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}
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/* check the previous command is completed */
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for (i = 0; i < E1000_MNG_DHCP_COMMAND_TIMEOUT; i++) {
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hicr = E1000_READ_REG(hw, E1000_HICR);
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if (!(hicr & E1000_HICR_C))
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break;
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msec_delay_irq(1);
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}
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if (i == E1000_MNG_DHCP_COMMAND_TIMEOUT) {
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DEBUGOUT("Previous command timeout failed .\n");
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ret_val = -E1000_ERR_HOST_INTERFACE_COMMAND;
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goto out;
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}
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out:
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return ret_val;
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}
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/**
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* e1000_check_mng_mode_generic - Generic check management mode
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* @hw: pointer to the HW structure
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*
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* Reads the firmware semaphore register and returns true (>0) if
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* manageability is enabled, else false (0).
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**/
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bool e1000_check_mng_mode_generic(struct e1000_hw *hw)
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{
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u32 fwsm;
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DEBUGFUNC("e1000_check_mng_mode_generic");
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fwsm = E1000_READ_REG(hw, E1000_FWSM);
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return ((fwsm & E1000_FWSM_MODE_MASK) ==
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(E1000_MNG_IAMT_MODE << E1000_FWSM_MODE_SHIFT));
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}
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/**
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* e1000_enable_tx_pkt_filtering_generic - Enable packet filtering on TX
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* @hw: pointer to the HW structure
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*
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* Enables packet filtering on transmit packets if manageability is enabled
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* and host interface is enabled.
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**/
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bool e1000_enable_tx_pkt_filtering_generic(struct e1000_hw *hw)
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{
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struct e1000_host_mng_dhcp_cookie *hdr = &hw->mng_cookie;
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u32 *buffer = (u32 *)&hw->mng_cookie;
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u32 offset;
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s32 ret_val, hdr_csum, csum;
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u8 i, len;
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bool tx_filter = TRUE;
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DEBUGFUNC("e1000_enable_tx_pkt_filtering_generic");
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/* No manageability, no filtering */
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if (!hw->mac.ops.check_mng_mode(hw)) {
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tx_filter = FALSE;
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goto out;
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}
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/*
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* If we can't read from the host interface for whatever
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* reason, disable filtering.
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*/
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ret_val = hw->mac.ops.mng_enable_host_if(hw);
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if (ret_val != E1000_SUCCESS) {
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tx_filter = FALSE;
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goto out;
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}
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/* Read in the header. Length and offset are in dwords. */
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len = E1000_MNG_DHCP_COOKIE_LENGTH >> 2;
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offset = E1000_MNG_DHCP_COOKIE_OFFSET >> 2;
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for (i = 0; i < len; i++) {
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*(buffer + i) = E1000_READ_REG_ARRAY_DWORD(hw,
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E1000_HOST_IF,
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offset + i);
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}
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hdr_csum = hdr->checksum;
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hdr->checksum = 0;
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csum = e1000_calculate_checksum((u8 *)hdr,
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E1000_MNG_DHCP_COOKIE_LENGTH);
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/*
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* If either the checksums or signature don't match, then
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* the cookie area isn't considered valid, in which case we
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* take the safe route of assuming Tx filtering is enabled.
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*/
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if (hdr_csum != csum)
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goto out;
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if (hdr->signature != E1000_IAMT_SIGNATURE)
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goto out;
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/* Cookie area is valid, make the final check for filtering. */
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if (!(hdr->status & E1000_MNG_DHCP_COOKIE_STATUS_PARSING))
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tx_filter = FALSE;
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out:
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hw->mac.tx_pkt_filtering = tx_filter;
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return tx_filter;
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}
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/**
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* e1000_mng_write_dhcp_info_generic - Writes DHCP info to host interface
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* @hw: pointer to the HW structure
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* @buffer: pointer to the host interface
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* @length: size of the buffer
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*
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* Writes the DHCP information to the host interface.
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**/
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s32 e1000_mng_write_dhcp_info_generic(struct e1000_hw * hw, u8 *buffer,
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u16 length)
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{
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struct e1000_host_mng_command_header hdr;
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s32 ret_val;
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u32 hicr;
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DEBUGFUNC("e1000_mng_write_dhcp_info_generic");
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hdr.command_id = E1000_MNG_DHCP_TX_PAYLOAD_CMD;
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hdr.command_length = length;
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hdr.reserved1 = 0;
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hdr.reserved2 = 0;
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hdr.checksum = 0;
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/* Enable the host interface */
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ret_val = hw->mac.ops.mng_enable_host_if(hw);
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if (ret_val)
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goto out;
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/* Populate the host interface with the contents of "buffer". */
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ret_val = hw->mac.ops.mng_host_if_write(hw, buffer, length,
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sizeof(hdr), &(hdr.checksum));
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if (ret_val)
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goto out;
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/* Write the manageability command header */
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ret_val = hw->mac.ops.mng_write_cmd_header(hw, &hdr);
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if (ret_val)
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goto out;
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/* Tell the ARC a new command is pending. */
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hicr = E1000_READ_REG(hw, E1000_HICR);
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E1000_WRITE_REG(hw, E1000_HICR, hicr | E1000_HICR_C);
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out:
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return ret_val;
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}
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/**
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* e1000_mng_write_cmd_header_generic - Writes manageability command header
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* @hw: pointer to the HW structure
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* @hdr: pointer to the host interface command header
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*
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* Writes the command header after does the checksum calculation.
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**/
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s32 e1000_mng_write_cmd_header_generic(struct e1000_hw * hw,
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struct e1000_host_mng_command_header * hdr)
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{
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u16 i, length = sizeof(struct e1000_host_mng_command_header);
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DEBUGFUNC("e1000_mng_write_cmd_header_generic");
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/* Write the whole command header structure with new checksum. */
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hdr->checksum = e1000_calculate_checksum((u8 *)hdr, length);
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length >>= 2;
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/* Write the relevant command block into the ram area. */
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for (i = 0; i < length; i++) {
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E1000_WRITE_REG_ARRAY_DWORD(hw, E1000_HOST_IF, i,
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*((u32 *) hdr + i));
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E1000_WRITE_FLUSH(hw);
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}
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return E1000_SUCCESS;
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}
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/**
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* e1000_mng_host_if_write_generic - Write to the manageability host interface
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* @hw: pointer to the HW structure
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* @buffer: pointer to the host interface buffer
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* @length: size of the buffer
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* @offset: location in the buffer to write to
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* @sum: sum of the data (not checksum)
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*
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* This function writes the buffer content at the offset given on the host if.
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* It also does alignment considerations to do the writes in most efficient
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* way. Also fills up the sum of the buffer in *buffer parameter.
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**/
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s32 e1000_mng_host_if_write_generic(struct e1000_hw * hw, u8 *buffer,
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u16 length, u16 offset, u8 *sum)
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{
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u8 *tmp;
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u8 *bufptr = buffer;
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u32 data = 0;
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s32 ret_val = E1000_SUCCESS;
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u16 remaining, i, j, prev_bytes;
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DEBUGFUNC("e1000_mng_host_if_write_generic");
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/* sum = only sum of the data and it is not checksum */
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if (length == 0 || offset + length > E1000_HI_MAX_MNG_DATA_LENGTH) {
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ret_val = -E1000_ERR_PARAM;
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goto out;
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}
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tmp = (u8 *)&data;
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prev_bytes = offset & 0x3;
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offset >>= 2;
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if (prev_bytes) {
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data = E1000_READ_REG_ARRAY_DWORD(hw, E1000_HOST_IF, offset);
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for (j = prev_bytes; j < sizeof(u32); j++) {
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*(tmp + j) = *bufptr++;
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*sum += *(tmp + j);
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}
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E1000_WRITE_REG_ARRAY_DWORD(hw, E1000_HOST_IF, offset, data);
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length -= j - prev_bytes;
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offset++;
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}
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remaining = length & 0x3;
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length -= remaining;
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/* Calculate length in DWORDs */
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length >>= 2;
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/*
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* The device driver writes the relevant command block into the
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* ram area.
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*/
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for (i = 0; i < length; i++) {
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for (j = 0; j < sizeof(u32); j++) {
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*(tmp + j) = *bufptr++;
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*sum += *(tmp + j);
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}
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E1000_WRITE_REG_ARRAY_DWORD(hw, E1000_HOST_IF, offset + i, data);
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}
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if (remaining) {
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for (j = 0; j < sizeof(u32); j++) {
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if (j < remaining)
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*(tmp + j) = *bufptr++;
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else
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*(tmp + j) = 0;
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*sum += *(tmp + j);
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}
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E1000_WRITE_REG_ARRAY_DWORD(hw, E1000_HOST_IF, offset + i, data);
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}
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out:
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return ret_val;
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}
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/**
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* e1000_enable_mng_pass_thru - Enable processing of ARP's
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* @hw: pointer to the HW structure
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*
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* Verifies the hardware needs to allow ARPs to be processed by the host.
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**/
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bool e1000_enable_mng_pass_thru(struct e1000_hw *hw)
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{
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u32 manc;
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u32 fwsm, factps;
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bool ret_val = FALSE;
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DEBUGFUNC("e1000_enable_mng_pass_thru");
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if (!hw->mac.asf_firmware_present)
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goto out;
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manc = E1000_READ_REG(hw, E1000_MANC);
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if (!(manc & E1000_MANC_RCV_TCO_EN) ||
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!(manc & E1000_MANC_EN_MAC_ADDR_FILTER))
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goto out;
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if (hw->mac.arc_subsystem_valid) {
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fwsm = E1000_READ_REG(hw, E1000_FWSM);
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factps = E1000_READ_REG(hw, E1000_FACTPS);
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if (!(factps & E1000_FACTPS_MNGCG) &&
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((fwsm & E1000_FWSM_MODE_MASK) ==
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(e1000_mng_mode_pt << E1000_FWSM_MODE_SHIFT))) {
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ret_val = TRUE;
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goto out;
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}
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} else {
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if ((manc & E1000_MANC_SMBUS_EN) &&
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!(manc & E1000_MANC_ASF_EN)) {
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ret_val = TRUE;
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goto out;
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}
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}
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out:
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return ret_val;
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}
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