6f4a9c1918
Currently, bwn(4) relies on the siba_bwn(4) bus driver to provide support for the on-chip SSB interconnect found in Broadcom's older PCI(e) Wi-Fi adapters. Non-PCI Wi-Fi adapters, as well as the newer BCMA interconnect found in post-2009 Broadcom Wi-Fi hardware, are not supported by siba_bwn(4). The bhnd(4) bus driver (also used by the FreeBSD/MIPS Broadcom port) provides a unified kernel interface to a superset of the hardware supported by siba_bwn; by attaching bwn(4) via bhnd(4), we can support both modern PCI(e) Wi-Fi devices based on the BCMA backplane interconnect, as well as Broadcom MIPS WiSoCs that include a D11 MAC core directly attached to their SSB or BCMA backplane. This diff introduces opt-in bwn(4) support for bhnd(4) by providing: - A small bwn(4) driver subclass, if_bwn_bhnd, that attaches via bhnd(4) instead of siba_bwn(4). - A bhndb(4)-based PCI host bridge driver, if_bwn_pci, that optionally probes at a higher priority than the siba_bwn(4) PCI driver. - A set of compatibility shims that perform translation of bwn(4)'s siba_bwn function calls into their bhnd(9) API equivalents when bwn(4) is attached via a bhnd(4) bus parent. When bwn(4) is attached via siba_bwn(4), all siba_bwn function calls are simply passed through to their original implementations. To test bwn(4) with bhnd(4), place the following lines in loader.conf(5): hw.bwn_pci.preferred="1" if_bwn_pci_load="YES bwn_v4_ucode_load="YES" bwn_v4_lp_ucode_load="YES" To verify that bwn(4) is using bhnd(4), you can check dmesg: bwn0: <Broadcom 802.11 MAC/PHY/Radio, rev 15> ... on bhnd0 ... or devinfo(8): pcib2 pci2 bwn_pci0 bhndb0 bhnd0 bwn0 ... bwn(4)/bhnd(4) has been tested for regressions with most chipsets currently supported by bwn(4), including: - BCM4312 - BCM4318 - BCM4321 With minimal changes to the DMA code (not included in this commit), I was also able to test support for newer BCMA devices by bringing up basic working Wi-Fi on two previously unsupported, BCMA-based N-PHY chipsets: - BCM43224 - BCM43225 Approved by: adrian (mentor, implicit) Sponsored by: The FreeBSD Foundation & Plausible Labs Differential Revision: https://reviews.freebsd.org/D13041
200 lines
5.8 KiB
C
200 lines
5.8 KiB
C
/*-
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* Copyright (c) 2009-2010 Weongyo Jeong <weongyo@freebsd.org>
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* Copyright (c) 2016 Adrian Chadd <adrian@freebsd.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer,
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* without modification.
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* 2. Redistributions in binary form must reproduce at minimum a disclaimer
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* similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
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* redistribution must be conditioned upon including a substantially
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* similar Disclaimer requirement for further binary redistribution.
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*
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* NO WARRANTY
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
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* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
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* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
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* IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGES.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "opt_bwn.h"
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#include "opt_wlan.h"
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/*
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* The Broadcom Wireless LAN controller driver.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/malloc.h>
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#include <sys/module.h>
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#include <sys/endian.h>
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#include <sys/errno.h>
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#include <sys/firmware.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <sys/bus.h>
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#include <sys/rman.h>
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#include <sys/socket.h>
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#include <sys/sockio.h>
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#include <net/ethernet.h>
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#include <net/if.h>
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#include <net/if_var.h>
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#include <net/if_arp.h>
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#include <net/if_dl.h>
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#include <net/if_llc.h>
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#include <net/if_media.h>
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#include <net/if_types.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#include <net80211/ieee80211_var.h>
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#include <net80211/ieee80211_radiotap.h>
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#include <net80211/ieee80211_regdomain.h>
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#include <net80211/ieee80211_phy.h>
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#include <net80211/ieee80211_ratectl.h>
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#include <dev/bwn/if_bwn_siba.h>
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#include <dev/bwn/if_bwnreg.h>
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#include <dev/bwn/if_bwnvar.h>
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#include <dev/bwn/if_bwn_chipid.h>
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#include <dev/bwn/if_bwn_debug.h>
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#include <dev/bwn/if_bwn_misc.h>
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#include <dev/bwn/if_bwn_phy_common.h>
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void
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bwn_mac_switch_freq(struct bwn_mac *mac, int spurmode)
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{
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struct bwn_softc *sc = mac->mac_sc;
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uint16_t chip_id = siba_get_chipid(sc->sc_dev);
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if (chip_id == BCMA_CHIP_ID_BCM4331) {
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switch (spurmode) {
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case 2: /* 168 Mhz: 2^26/168 = 0x61862 */
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BWN_WRITE_2(mac, BWN_TSF_CLK_FRAC_LOW, 0x1862);
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BWN_WRITE_2(mac, BWN_TSF_CLK_FRAC_HIGH, 0x6);
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break;
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case 1: /* 164 Mhz: 2^26/164 = 0x63e70 */
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BWN_WRITE_2(mac, BWN_TSF_CLK_FRAC_LOW, 0x3e70);
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BWN_WRITE_2(mac, BWN_TSF_CLK_FRAC_HIGH, 0x6);
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break;
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default: /* 160 Mhz: 2^26/160 = 0x66666 */
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BWN_WRITE_2(mac, BWN_TSF_CLK_FRAC_LOW, 0x6666);
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BWN_WRITE_2(mac, BWN_TSF_CLK_FRAC_HIGH, 0x6);
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break;
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}
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} else if (chip_id == BCMA_CHIP_ID_BCM43131 ||
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chip_id == BCMA_CHIP_ID_BCM43217 ||
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chip_id == BCMA_CHIP_ID_BCM43222 ||
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chip_id == BCMA_CHIP_ID_BCM43224 ||
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chip_id == BCMA_CHIP_ID_BCM43225 ||
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chip_id == BCMA_CHIP_ID_BCM43227 ||
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chip_id == BCMA_CHIP_ID_BCM43228) {
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switch (spurmode) {
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case 2: /* 126 Mhz */
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BWN_WRITE_2(mac, BWN_TSF_CLK_FRAC_LOW, 0x2082);
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BWN_WRITE_2(mac, BWN_TSF_CLK_FRAC_HIGH, 0x8);
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break;
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case 1: /* 123 Mhz */
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BWN_WRITE_2(mac, BWN_TSF_CLK_FRAC_LOW, 0x5341);
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BWN_WRITE_2(mac, BWN_TSF_CLK_FRAC_HIGH, 0x8);
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break;
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default: /* 120 Mhz */
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BWN_WRITE_2(mac, BWN_TSF_CLK_FRAC_LOW, 0x8889);
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BWN_WRITE_2(mac, BWN_TSF_CLK_FRAC_HIGH, 0x8);
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break;
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}
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} else if (mac->mac_phy.type == BWN_PHYTYPE_LCN) {
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switch (spurmode) {
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case 1: /* 82 Mhz */
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BWN_WRITE_2(mac, BWN_TSF_CLK_FRAC_LOW, 0x7CE0);
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BWN_WRITE_2(mac, BWN_TSF_CLK_FRAC_HIGH, 0xC);
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break;
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default: /* 80 Mhz */
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BWN_WRITE_2(mac, BWN_TSF_CLK_FRAC_LOW, 0xCCCD);
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BWN_WRITE_2(mac, BWN_TSF_CLK_FRAC_HIGH, 0xC);
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break;
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}
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}
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}
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/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/BmacPhyClkFgc */
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void
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bwn_phy_force_clock(struct bwn_mac *mac, int force)
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{
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struct bwn_softc *sc = mac->mac_sc;
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uint32_t tmp;
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/* XXX Only for N, HT and AC PHYs */
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tmp = siba_read_4(sc->sc_dev, SIBA_TGSLOW);
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if (force)
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tmp |= SIBA_TGSLOW_FGC;
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else
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tmp &= ~SIBA_TGSLOW_FGC;
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siba_write_4(sc->sc_dev, SIBA_TGSLOW, tmp);
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}
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int
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bwn_radio_wait_value(struct bwn_mac *mac, uint16_t offset, uint16_t mask,
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uint16_t value, int delay, int timeout)
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{
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uint16_t val;
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int i;
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for (i = 0; i < timeout; i += delay) {
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val = BWN_RF_READ(mac, offset);
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if ((val & mask) == value)
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return (1);
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DELAY(delay);
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}
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return (0);
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}
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void
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bwn_mac_phy_clock_set(struct bwn_mac *mac, int enabled)
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{
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struct bwn_softc *sc = mac->mac_sc;
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uint32_t val;
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val = siba_read_4(sc->sc_dev, SIBA_TGSLOW);
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if (enabled)
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val |= BWN_TGSLOW_MACPHYCLKEN;
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else
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val &= ~BWN_TGSLOW_MACPHYCLKEN;
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siba_write_4(sc->sc_dev, SIBA_TGSLOW, val);
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}
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/* http://bcm-v4.sipsolutions.net/802.11/PHY/BmacCorePllReset */
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void
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bwn_wireless_core_phy_pll_reset(struct bwn_mac *mac)
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{
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struct bwn_softc *sc = mac->mac_sc;
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siba_cc_write32(sc->sc_dev, SIBA_CC_CHIPCTL_ADDR, 0);
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siba_cc_mask32(sc->sc_dev, SIBA_CC_CHIPCTL_DATA, ~0x4);
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siba_cc_set32(sc->sc_dev, SIBA_CC_CHIPCTL_DATA, 0x4);
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siba_cc_mask32(sc->sc_dev, SIBA_CC_CHIPCTL_DATA, ~0x4);
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}
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