85531b7acc
table VCTRL registers. Unconditionally program the MSI-X vector control Mask field for MSI-X table entries without regarud for Mask's previous value. Some devices return all zeros on reads of the VCTRL registers, which would cause us to skip disabling interrupts. This fixes the Samsung SM961/PM961 SSDs which are return zero starting from offset 0x3084 within the memory region specified by BAR0, even when they are active MSI-X vectors. The Illumos kernel writes these unconditionally to 0 or 1. However, section 6.8.2.9 of the PCI Local Bus 3.0 spec (dated Feb 3, 2004) states for bits 31::01: After reset, the state of these bits must be 0. However, for potential future use, software must preserve the value of these reserved bits when modifying the value of other Vector Control bits. If software modifies the value of these reserved bits, the result is undefined." so we always set or clear the Mask bit, but otherwise preserves the old value. PR: https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=211713 Reviewed By: imp, jhb Submitted by: Ka Ho Ng MFC After: 1 week Differential Revision: https://reviews.freebsd.org/D20873 |
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fixup_pci.c | ||
hostb_pci.c | ||
ignore_pci.c | ||
isa_pci.c | ||
pci_host_generic_acpi.c | ||
pci_host_generic_fdt.c | ||
pci_host_generic_fdt.h | ||
pci_host_generic.c | ||
pci_host_generic.h | ||
pci_if.m | ||
pci_iov_if.m | ||
pci_iov_private.h | ||
pci_iov_schema.c | ||
pci_iov.c | ||
pci_iov.h | ||
pci_pci.c | ||
pci_private.h | ||
pci_subr.c | ||
pci_user.c | ||
pci.c | ||
pcib_if.m | ||
pcib_private.h | ||
pcib_support.c | ||
pcireg.h | ||
pcivar.h | ||
schema_private.h | ||
vga_pci.c |