hselasky 8646e68235 10G ER/LR should present itself as LR. ... MFC after: 1 week Submitted by: Shahar Klein <shahark@mellanox.com> Sponsored by: Mellanox Technologies		2015-12-30 14:54:08 +00:00
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en.h	10G ER/LR should present itself as LR.	2015-12-30 14:54:08 +00:00
mlx5_en_ethtool.c	Add support for CQE zipping. CQE zipping reduces PCI overhead by	2015-12-28 18:50:18 +00:00
mlx5_en_flow_table.c	Style changes, mostly automated.	2015-11-19 10:28:51 +00:00
mlx5_en_main.c	10G ER/LR should present itself as LR.	2015-12-30 14:54:08 +00:00
mlx5_en_rx.c	Add support for CQE zipping. CQE zipping reduces PCI overhead by	2015-12-28 18:50:18 +00:00
mlx5_en_tx.c	Add support for CQE zipping. CQE zipping reduces PCI overhead by	2015-12-28 18:50:18 +00:00
mlx5_en_txrx.c	Add support for CQE zipping. CQE zipping reduces PCI overhead by	2015-12-28 18:50:18 +00:00
tcp_tlro.c	Style changes, mostly automated.	2015-11-19 10:28:51 +00:00
tcp_tlro.h	Style changes, mostly automated.	2015-11-19 10:28:51 +00:00