d07f36b075
Sponsored by: FreeBSD Foundation and Google Inc.
381 lines
9.6 KiB
C
381 lines
9.6 KiB
C
/*-
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* Copyright (c) 2005, Joseph Koshy
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* Copyright (c) 2007 The FreeBSD Foundation
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* All rights reserved.
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*
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* Portions of this software were developed by A. Joseph Koshy under
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* sponsorship from the FreeBSD Foundation and Google, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/bus.h>
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#include <sys/pmc.h>
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#include <sys/proc.h>
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#include <sys/systm.h>
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#include <machine/cpu.h>
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#include <machine/apicreg.h>
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#include <machine/pmc_mdep.h>
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#include <machine/md_var.h>
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#include <vm/vm.h>
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#include <vm/vm_param.h>
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#include <vm/pmap.h>
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extern volatile lapic_t *lapic;
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void
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pmc_x86_lapic_enable_pmc_interrupt(void)
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{
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uint32_t value;
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value = lapic->lvt_pcint;
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value &= ~APIC_LVT_M;
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lapic->lvt_pcint = value;
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}
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/*
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* Attempt to walk a user call stack using a too-simple algorithm.
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* In the general case we need unwind information associated with
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* the executable to be able to walk the user stack.
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*
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* We are handed a trap frame laid down at the time the PMC interrupt
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* was taken. If the application is using frame pointers, the saved
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* PC value could be:
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* a. at the beginning of a function before the stack frame is laid
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* down,
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* b. just before a 'ret', after the stack frame has been taken off,
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* c. somewhere else in the function with a valid stack frame being
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* present,
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*
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* If the application is not using frame pointers, this algorithm will
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* fail to yield an interesting call chain.
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*
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* TODO: figure out a way to use unwind information.
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*/
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int
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pmc_save_user_callchain(uintptr_t *cc, int nframes, struct trapframe *tf)
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{
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int n;
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uint32_t instr;
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uintptr_t fp, oldfp, pc, r, sp;
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KASSERT(TRAPF_USERMODE(tf), ("[x86,%d] Not a user trap frame tf=%p",
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__LINE__, (void *) tf));
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pc = PMC_TRAPFRAME_TO_PC(tf);
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oldfp = fp = PMC_TRAPFRAME_TO_FP(tf);
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sp = PMC_TRAPFRAME_TO_SP(tf);
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*cc++ = pc; n = 1;
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r = fp + sizeof(uintptr_t); /* points to return address */
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if (!PMC_IN_USERSPACE(pc))
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return (n);
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if (copyin((void *) pc, &instr, sizeof(instr)) != 0)
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return (n);
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if (PMC_AT_FUNCTION_PROLOGUE_PUSH_BP(instr) ||
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PMC_AT_FUNCTION_EPILOGUE_RET(instr)) { /* ret */
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if (copyin((void *) sp, &pc, sizeof(pc)) != 0)
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return (n);
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} else if (PMC_AT_FUNCTION_PROLOGUE_MOV_SP_BP(instr)) {
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sp += sizeof(uintptr_t);
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if (copyin((void *) sp, &pc, sizeof(pc)) != 0)
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return (n);
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} else if (copyin((void *) r, &pc, sizeof(pc)) != 0 ||
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copyin((void *) fp, &fp, sizeof(fp) != 0))
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return (n);
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for (; n < nframes;) {
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if (pc == 0 || !PMC_IN_USERSPACE(pc))
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break;
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*cc++ = pc; n++;
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if (fp < oldfp)
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break;
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r = fp + sizeof(uintptr_t); /* address of return address */
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oldfp = fp;
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if (copyin((void *) r, &pc, sizeof(pc)) != 0 ||
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copyin((void *) fp, &fp, sizeof(fp)) != 0)
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break;
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}
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return (n);
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}
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/*
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* Walking the kernel call stack.
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*
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* We are handed the trap frame laid down at the time the PMC
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* interrupt was taken. The saved PC could be:
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* a. in the lowlevel trap handler, meaning that there isn't a C stack
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* to traverse,
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* b. at the beginning of a function before the stack frame is laid
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* down,
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* c. just before a 'ret', after the stack frame has been taken off,
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* d. somewhere else in a function with a valid stack frame being
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* present.
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*
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* In case (d), the previous frame pointer is at [%ebp]/[%rbp] and
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* the return address is at [%ebp+4]/[%rbp+8].
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*
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* For cases (b) and (c), the return address is at [%esp]/[%rsp] and
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* the frame pointer doesn't need to be changed when going up one
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* level in the stack.
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*
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* For case (a), we check if the PC lies in low-level trap handling
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* code, and if so we terminate our trace.
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*/
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int
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pmc_save_kernel_callchain(uintptr_t *cc, int nframes, struct trapframe *tf)
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{
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int n;
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uint32_t instr;
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uintptr_t fp, pc, r, sp, stackstart, stackend;
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struct thread *td;
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KASSERT(TRAPF_USERMODE(tf) == 0,("[x86,%d] not a kernel backtrace",
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__LINE__));
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pc = PMC_TRAPFRAME_TO_PC(tf);
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fp = PMC_TRAPFRAME_TO_FP(tf);
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sp = PMC_TRAPFRAME_TO_SP(tf);
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*cc++ = pc;
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r = fp + sizeof(uintptr_t); /* points to return address */
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if ((td = curthread) == NULL)
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return (1);
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if (nframes <= 1)
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return (1);
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stackstart = (uintptr_t) td->td_kstack;
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stackend = (uintptr_t) td->td_kstack + td->td_kstack_pages * PAGE_SIZE;
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if (PMC_IN_TRAP_HANDLER(pc) ||
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!PMC_IN_KERNEL(pc) || !PMC_IN_KERNEL(r) ||
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!PMC_IN_KERNEL_STACK(sp, stackstart, stackend) ||
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!PMC_IN_KERNEL_STACK(fp, stackstart, stackend))
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return (1);
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instr = *(uint32_t *) pc;
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/*
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* Determine whether the interrupted function was in the
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* processing of either laying down its stack frame or taking
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* it off.
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*
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* If we haven't started laying down a stack frame, or are
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* just about to return, then our caller's address is at
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* *sp, and we don't have a frame to unwind.
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*/
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if (PMC_AT_FUNCTION_PROLOGUE_PUSH_BP(instr) ||
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PMC_AT_FUNCTION_EPILOGUE_RET(instr))
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pc = *(uintptr_t *) sp;
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else if (PMC_AT_FUNCTION_PROLOGUE_MOV_SP_BP(instr)) {
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/*
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* The code was midway through laying down a frame.
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* At this point sp[0] has a frame back pointer,
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* and the caller's address is therefore at sp[1].
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*/
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sp += sizeof(uintptr_t);
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if (!PMC_IN_KERNEL_STACK(sp, stackstart, stackend))
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return (1);
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pc = *(uintptr_t *) sp;
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} else {
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/*
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* Not in the function prologue or epilogue.
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*/
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pc = *(uintptr_t *) r;
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fp = *(uintptr_t *) fp;
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}
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for (n = 1; n < nframes; n++) {
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*cc++ = pc;
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if (PMC_IN_TRAP_HANDLER(pc))
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break;
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r = fp + sizeof(uintptr_t);
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if (!PMC_IN_KERNEL_STACK(fp, stackstart, stackend) ||
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!PMC_IN_KERNEL(r))
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break;
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pc = *(uintptr_t *) r;
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fp = *(uintptr_t *) fp;
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}
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return (n);
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}
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static struct pmc_mdep *
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pmc_intel_initialize(void)
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{
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struct pmc_mdep *pmc_mdep;
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enum pmc_cputype cputype;
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int error, model;
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KASSERT(strcmp(cpu_vendor, "GenuineIntel") == 0,
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("[intel,%d] Initializing non-intel processor", __LINE__));
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PMCDBG(MDP,INI,0, "intel-initialize cpuid=0x%x", cpu_id);
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cputype = -1;
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switch (cpu_id & 0xF00) {
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#if defined(__i386__)
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case 0x500: /* Pentium family processors */
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cputype = PMC_CPU_INTEL_P5;
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break;
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case 0x600: /* Pentium Pro, Celeron, Pentium II & III */
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switch ((cpu_id & 0xF0) >> 4) { /* model number field */
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case 0x1:
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cputype = PMC_CPU_INTEL_P6;
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break;
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case 0x3: case 0x5:
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cputype = PMC_CPU_INTEL_PII;
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break;
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case 0x6:
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cputype = PMC_CPU_INTEL_CL;
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break;
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case 0x7: case 0x8: case 0xA: case 0xB:
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cputype = PMC_CPU_INTEL_PIII;
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break;
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case 0x9: case 0xD:
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cputype = PMC_CPU_INTEL_PM;
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break;
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}
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break;
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#endif
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#if defined(__i386__) || defined(__amd64__)
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case 0xF00: /* P4 */
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model = ((cpu_id & 0xF0000) >> 12) | ((cpu_id & 0xF0) >> 4);
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if (model >= 0 && model <= 6) /* known models */
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cputype = PMC_CPU_INTEL_PIV;
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break;
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}
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#endif
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if ((int) cputype == -1) {
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printf("pmc: Unknown Intel CPU.\n");
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return NULL;
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}
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MALLOC(pmc_mdep, struct pmc_mdep *, sizeof(struct pmc_mdep),
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M_PMC, M_WAITOK|M_ZERO);
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pmc_mdep->pmd_cputype = cputype;
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pmc_mdep->pmd_nclass = 2;
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pmc_mdep->pmd_classes[0].pm_class = PMC_CLASS_TSC;
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pmc_mdep->pmd_classes[0].pm_caps = PMC_CAP_READ;
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pmc_mdep->pmd_classes[0].pm_width = 64;
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pmc_mdep->pmd_nclasspmcs[0] = 1;
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error = 0;
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switch (cputype) {
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#if defined(__i386__) || defined(__amd64__)
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/*
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* Intel Pentium 4 Processors, and P4/EMT64 processors.
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*/
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case PMC_CPU_INTEL_PIV:
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error = pmc_initialize_p4(pmc_mdep);
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break;
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#endif
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#if defined(__i386__)
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/*
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* P6 Family Processors
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*/
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case PMC_CPU_INTEL_P6:
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case PMC_CPU_INTEL_CL:
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case PMC_CPU_INTEL_PII:
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case PMC_CPU_INTEL_PIII:
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case PMC_CPU_INTEL_PM:
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error = pmc_initialize_p6(pmc_mdep);
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break;
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/*
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* Intel Pentium PMCs.
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*/
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case PMC_CPU_INTEL_P5:
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error = pmc_initialize_p5(pmc_mdep);
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break;
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#endif
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default:
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KASSERT(0,("[intel,%d] Unknown CPU type", __LINE__));
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}
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if (error) {
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FREE(pmc_mdep, M_PMC);
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pmc_mdep = NULL;
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}
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return pmc_mdep;
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}
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/*
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* Machine dependent initialization for x86 class platforms.
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*/
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struct pmc_mdep *
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pmc_md_initialize()
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{
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int i;
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struct pmc_mdep *md;
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/* determine the CPU kind */
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md = NULL;
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if (strcmp(cpu_vendor, "AuthenticAMD") == 0)
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md = pmc_amd_initialize();
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else if (strcmp(cpu_vendor, "GenuineIntel") == 0)
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md = pmc_intel_initialize();
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/* disallow sampling if we do not have an LAPIC */
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if (md != NULL && lapic == NULL)
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for (i = 1; i < md->pmd_nclass; i++)
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md->pmd_classes[i].pm_caps &= ~PMC_CAP_INTERRUPT;
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return md;
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}
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