3feffbd796
Each set of frames pushed into a FIFO is represented by a list of ath_bufs - the first ath_buf in the FIFO list is marked with ATH_BUF_FIFOPTR; the last ath_buf in the FIFO list is marked with ATH_BUF_FIFOEND. Multiple lists of frames are just glued together in the TAILQ as per normal - except that at the end of a FIFO list, the descriptor link pointer will be NULL and it'll be tagged with ATH_BUF_FIFOEND. For non-EDMA chipsets this is a no-op - the ath_txq frame list (axq_q) stays the same and is treated the same. For EDMA chipsets the frames are pushed into axq_q and then when the FIFO is to be (re) filled, frames will be moved onto the FIFO queue and then pushed into the FIFO. So: * Add a new queue in each hardware TXQ (ath_txq) for staging FIFO frame lists. It's a TAILQ (like the normal hardware frame queue) rather than the ath9k list-of-lists to represent FIFO entries. * Add new ath_buf flags - ATH_TX_FIFOPTR and ATH_TX_FIFOEND. * When allocating ath_buf entries, clear out the flag value before returning it or it'll end up having stale flags. * When cloning ath_buf entries, only clone ATH_BUF_MGMT. Don't clone the FIFO related flags. * Extend ath_tx_draintxq() to first drain the FIFO staging queue, _then_ drain the normal hardware queue. Tested: * AR9280, hostap * AR9280, STA * AR9380/AR9580 - hostap TODO: * Test on other chipsets, just to be thorough.
151 lines
5.2 KiB
C
151 lines
5.2 KiB
C
/*-
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* Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer,
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* without modification.
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* 2. Redistributions in binary form must reproduce at minimum a disclaimer
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* similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
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* redistribution must be conditioned upon including a substantially
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* similar Disclaimer requirement for further binary redistribution.
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*
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* NO WARRANTY
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
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* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
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* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
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* IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGES.
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*
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* $FreeBSD$
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*/
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#ifndef __IF_ATH_MISC_H__
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#define __IF_ATH_MISC_H__
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/*
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* This is where definitions for "public things" in if_ath.c
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* will go for the time being.
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*
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* Anything in here should eventually be moved out of if_ath.c
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* and into something else.
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*/
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/* unaligned little endian access */
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#define LE_READ_2(p) \
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((u_int16_t) \
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((((u_int8_t *)(p))[0] ) | (((u_int8_t *)(p))[1] << 8)))
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#define LE_READ_4(p) \
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((u_int32_t) \
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((((u_int8_t *)(p))[0] ) | (((u_int8_t *)(p))[1] << 8) | \
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(((u_int8_t *)(p))[2] << 16) | (((u_int8_t *)(p))[3] << 24)))
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extern int ath_rxbuf;
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extern int ath_txbuf;
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extern int ath_txbuf_mgmt;
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extern int ath_tx_findrix(const struct ath_softc *sc, uint8_t rate);
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extern struct ath_buf * ath_getbuf(struct ath_softc *sc,
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ath_buf_type_t btype);
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extern struct ath_buf * _ath_getbuf_locked(struct ath_softc *sc,
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ath_buf_type_t btype);
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extern struct ath_buf * ath_buf_clone(struct ath_softc *sc,
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const struct ath_buf *bf);
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/* XXX change this to NULL the buffer pointer? */
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extern void ath_freebuf(struct ath_softc *sc, struct ath_buf *bf);
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extern void ath_returnbuf_head(struct ath_softc *sc, struct ath_buf *bf);
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extern void ath_returnbuf_tail(struct ath_softc *sc, struct ath_buf *bf);
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extern int ath_reset(struct ifnet *, ATH_RESET_TYPE);
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extern void ath_tx_default_comp(struct ath_softc *sc, struct ath_buf *bf,
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int fail);
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extern void ath_tx_update_ratectrl(struct ath_softc *sc,
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struct ieee80211_node *ni, struct ath_rc_series *rc,
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struct ath_tx_status *ts, int frmlen, int nframes, int nbad);
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extern int ath_hal_gethangstate(struct ath_hal *ah, uint32_t mask,
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uint32_t *hangs);
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extern void ath_tx_freebuf(struct ath_softc *sc, struct ath_buf *bf,
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int status);
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extern void ath_txq_freeholdingbuf(struct ath_softc *sc,
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struct ath_txq *txq);
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extern void ath_txqmove(struct ath_txq *dst, struct ath_txq *src);
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extern void ath_mode_init(struct ath_softc *sc);
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extern void ath_setdefantenna(struct ath_softc *sc, u_int antenna);
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extern void ath_setslottime(struct ath_softc *sc);
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extern int ath_descdma_alloc_desc(struct ath_softc *sc,
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struct ath_descdma *dd, ath_bufhead *head, const char *name,
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int ds_size, int ndesc);
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extern int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
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ath_bufhead *head, const char *name, int ds_size, int nbuf,
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int ndesc);
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extern int ath_descdma_setup_rx_edma(struct ath_softc *sc,
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struct ath_descdma *dd, ath_bufhead *head, const char *name,
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int nbuf, int desclen);
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extern void ath_descdma_cleanup(struct ath_softc *sc,
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struct ath_descdma *dd, ath_bufhead *head);
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extern void ath_legacy_attach_comp_func(struct ath_softc *sc);
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extern void ath_tx_draintxq(struct ath_softc *sc, struct ath_txq *txq);
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extern void ath_legacy_tx_drain(struct ath_softc *sc,
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ATH_RESET_TYPE reset_type);
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extern void ath_tx_process_buf_completion(struct ath_softc *sc,
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struct ath_txq *txq, struct ath_tx_status *ts, struct ath_buf *bf);
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extern int ath_stoptxdma(struct ath_softc *sc);
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extern void ath_tx_update_tim(struct ath_softc *sc,
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struct ieee80211_node *ni, int enable);
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/*
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* This is only here so that the RX proc function can call it.
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* It's very likely that the "start TX after RX" call should be
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* done via something in if_ath.c, moving "rx tasklet" into
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* if_ath.c and do the ath_start() call there. Once that's done,
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* we can kill this.
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*/
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extern void ath_start(struct ifnet *ifp);
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extern void ath_start_task(void *arg, int npending);
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/*
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* Kick the frame TX task.
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*/
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static inline void
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ath_tx_kick(struct ath_softc *sc)
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{
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ATH_TX_LOCK(sc);
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ath_start(sc->sc_ifp);
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ATH_TX_UNLOCK(sc);
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}
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/*
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* Kick the software TX queue task.
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*/
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static inline void
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ath_tx_swq_kick(struct ath_softc *sc)
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{
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taskqueue_enqueue(sc->sc_tq, &sc->sc_txqtask);
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}
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#endif
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