15fe2454ae
o) Add 'octm', a trivial driver for the 10/100 management ports found on some Octeon systems. o) Make the Simple Executive's management port helper routines compile on FreeBSD (namely by not doing math on void pointers.) o) Add a cvmx_mgmt_port_sendm routine to the Simple Executive to send an mbuf so there is only one copy in the transmit path, rather than having to first copy the mbuf to an intermediate buffer and then copy that to the Simple Executive's transmit ring. o) Properly work out MII addresses of management ports on the Lanner MR-730. XXX The MR-730 also needs some patches to the MII read/write routines, but this is sufficient for now. Media detection will be fixed in the future when I can spend more time reading the vendor-supplied patches.
196 lines
8.3 KiB
C
196 lines
8.3 KiB
C
/***********************license start***************
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* Copyright (c) 2003-2008 Cavium Networks (support@cavium.com). All rights
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* reserved.
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided
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* with the distribution.
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*
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* * Neither the name of Cavium Networks nor the names of
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* its contributors may be used to endorse or promote products
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* derived from this software without specific prior written
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* permission.
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*
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* TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
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* AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS
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* OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH
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* RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY
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* REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT
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* DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES
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* OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR
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* PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET
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* POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT
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* OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
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*
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*
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* For any questions regarding licensing please contact marketing@caviumnetworks.com
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*
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***********************license end**************************************/
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/* $FreeBSD$ */
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#ifndef _CVMX_CONFIG_H
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#define _CVMX_CONFIG_H
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#include "opt_cvmx.h"
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/mbuf.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <machine/pmap.h>
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#include <machine/stdarg.h>
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#define asm __asm
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#define CVMX_DONT_INCLUDE_CONFIG
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/* Define to enable the use of simple executive packet output functions.
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** For packet I/O setup enable the helper functions below.
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*/
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#define CVMX_ENABLE_PKO_FUNCTIONS
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/* Define to enable the use of simple executive helper functions. These
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** include many harware setup functions. See cvmx-helper.[ch] for
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** details.
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*/
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#define CVMX_ENABLE_HELPER_FUNCTIONS
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/* CVMX_HELPER_FIRST_MBUFF_SKIP is the number of bytes to reserve before
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** the beginning of the packet. If necessary, override the default
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** here. See the IPD section of the hardware manual for MBUFF SKIP
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** details.*/
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#define CVMX_HELPER_FIRST_MBUFF_SKIP 184
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/* CVMX_HELPER_NOT_FIRST_MBUFF_SKIP is the number of bytes to reserve in each
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** chained packet element. If necessary, override the default here */
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#define CVMX_HELPER_NOT_FIRST_MBUFF_SKIP 0
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/* CVMX_HELPER_ENABLE_BACK_PRESSURE controls whether back pressure is enabled
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** for all input ports. This controls if IPD sends backpressure to all ports if
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** Octeon's FPA pools don't have enough packet or work queue entries. Even when
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** this is off, it is still possible to get backpressure from individual
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** hardware ports. When configuring backpressure, also check
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** CVMX_HELPER_DISABLE_*_BACKPRESSURE below. If necessary, override the default
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** here */
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#define CVMX_HELPER_ENABLE_BACK_PRESSURE 1
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/* CVMX_HELPER_ENABLE_IPD controls if the IPD is enabled in the helper
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** function. Once it is enabled the hardware starts accepting packets. You
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** might want to skip the IPD enable if configuration changes are need
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** from the default helper setup. If necessary, override the default here */
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#define CVMX_HELPER_ENABLE_IPD 1
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/* CVMX_HELPER_INPUT_TAG_TYPE selects the type of tag that the IPD assigns
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** to incoming packets. */
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#define CVMX_HELPER_INPUT_TAG_TYPE CVMX_POW_TAG_TYPE_ORDERED
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/* The following select which fields are used by the PIP to generate
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** the tag on INPUT
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** 0: don't include
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** 1: include */
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#define CVMX_HELPER_INPUT_TAG_IPV6_SRC_IP 0
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#define CVMX_HELPER_INPUT_TAG_IPV6_DST_IP 0
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#define CVMX_HELPER_INPUT_TAG_IPV6_SRC_PORT 0
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#define CVMX_HELPER_INPUT_TAG_IPV6_DST_PORT 0
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#define CVMX_HELPER_INPUT_TAG_IPV6_NEXT_HEADER 0
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#define CVMX_HELPER_INPUT_TAG_IPV4_SRC_IP 0
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#define CVMX_HELPER_INPUT_TAG_IPV4_DST_IP 0
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#define CVMX_HELPER_INPUT_TAG_IPV4_SRC_PORT 0
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#define CVMX_HELPER_INPUT_TAG_IPV4_DST_PORT 0
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#define CVMX_HELPER_INPUT_TAG_IPV4_PROTOCOL 0
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#define CVMX_HELPER_INPUT_TAG_INPUT_PORT 1
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/* Select skip mode for input ports */
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#define CVMX_HELPER_INPUT_PORT_SKIP_MODE CVMX_PIP_PORT_CFG_MODE_SKIPL2
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/* Define the number of queues per output port */
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#define CVMX_HELPER_PKO_QUEUES_PER_PORT_INTERFACE0 1
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#define CVMX_HELPER_PKO_QUEUES_PER_PORT_INTERFACE1 1
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/* Configure PKO to use per-core queues (PKO lockless operation).
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** Please see the related SDK documentation for PKO that illustrates
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** how to enable and configure this option. */
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//#define CVMX_ENABLE_PKO_LOCKLESS_OPERATION 1
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//#define CVMX_HELPER_PKO_MAX_PORTS_INTERFACE0 8
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//#define CVMX_HELPER_PKO_MAX_PORTS_INTERFACE1 8
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/* Force backpressure to be disabled. This overrides all other
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** backpressure configuration */
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#define CVMX_HELPER_DISABLE_RGMII_BACKPRESSURE 1
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/* Disable the SPI4000's processing of backpressure packets and backpressure
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** generation. When this is 1, the SPI4000 will not stop sending packets when
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** receiving backpressure. It will also not generate backpressure packets when
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** its internal FIFOs are full. */
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#define CVMX_HELPER_DISABLE_SPI4000_BACKPRESSURE 1
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/* CVMX_HELPER_SPI_TIMEOUT is used to determine how long the SPI initialization
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** routines wait for SPI training. You can override the value using
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** executive-config.h if necessary */
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#define CVMX_HELPER_SPI_TIMEOUT 10
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/* Select the number of low latency memory ports (interfaces) that
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** will be configured. Valid values are 1 and 2.
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*/
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#define CVMX_LLM_CONFIG_NUM_PORTS 2
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/* Enable the fix for PKI-100 errata ("Size field is 8 too large in WQE and next
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** pointers"). If CVMX_ENABLE_LEN_M8_FIX is set to 0, the fix for this errata will
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** not be enabled.
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** 0: Fix is not enabled
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** 1: Fix is enabled, if supported by hardware
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*/
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#define CVMX_ENABLE_LEN_M8_FIX 1
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#if defined(CVMX_ENABLE_HELPER_FUNCTIONS) && !defined(CVMX_ENABLE_PKO_FUNCTIONS)
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#define CVMX_ENABLE_PKO_FUNCTIONS
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#endif
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/************************* Config Specific Defines ************************/
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#define CVMX_LLM_NUM_PORTS 1
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#define CVMX_PKO_QUEUES_PER_PORT_INTERFACE0 1 /**< PKO queues per port for interface 0 (ports 0-15) */
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#define CVMX_PKO_QUEUES_PER_PORT_INTERFACE1 1 /**< PKO queues per port for interface 1 (ports 16-31) */
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#define CVMX_PKO_MAX_PORTS_INTERFACE0 CVMX_HELPER_PKO_MAX_PORTS_INTERFACE0 /**< Limit on the number of PKO ports enabled for interface 0 */
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#define CVMX_PKO_MAX_PORTS_INTERFACE1 CVMX_HELPER_PKO_MAX_PORTS_INTERFACE1 /**< Limit on the number of PKO ports enabled for interface 1 */
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#define CVMX_PKO_QUEUES_PER_PORT_PCI 1 /**< PKO queues per port for PCI (ports 32-35) */
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#define CVMX_PKO_QUEUES_PER_PORT_LOOP 1 /**< PKO queues per port for Loop devices (ports 36-39) */
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/************************* FPA allocation *********************************/
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/* Pool sizes in bytes, must be multiple of a cache line */
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#define CVMX_FPA_POOL_0_SIZE (15 * CVMX_CACHE_LINE_SIZE)
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#define CVMX_FPA_POOL_1_SIZE (1 * CVMX_CACHE_LINE_SIZE)
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#define CVMX_FPA_POOL_2_SIZE (8 * CVMX_CACHE_LINE_SIZE)
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#define CVMX_FPA_POOL_3_SIZE (0 * CVMX_CACHE_LINE_SIZE)
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#define CVMX_FPA_POOL_4_SIZE (0 * CVMX_CACHE_LINE_SIZE)
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#define CVMX_FPA_POOL_5_SIZE (0 * CVMX_CACHE_LINE_SIZE)
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#define CVMX_FPA_POOL_6_SIZE (0 * CVMX_CACHE_LINE_SIZE)
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#define CVMX_FPA_POOL_7_SIZE (0 * CVMX_CACHE_LINE_SIZE)
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/* Pools in use */
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#define CVMX_FPA_PACKET_POOL (0) /**< Packet buffers */
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#define CVMX_FPA_PACKET_POOL_SIZE CVMX_FPA_POOL_0_SIZE
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#define CVMX_FPA_WQE_POOL (1) /**< Work queue entrys */
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#define CVMX_FPA_WQE_POOL_SIZE CVMX_FPA_POOL_1_SIZE
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#define CVMX_FPA_OUTPUT_BUFFER_POOL (2) /**< PKO queue command buffers */
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#define CVMX_FPA_OUTPUT_BUFFER_POOL_SIZE CVMX_FPA_POOL_2_SIZE
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/************************* FAU allocation ********************************/
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#define CVMX_FAU_REG_END 2048
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#define CVMX_SCR_SCRATCH 0
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#endif /* !_CVMX_CONFIG_H */
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