nwhitehorn 2a5e536b9e Allow the cacheline size on PowerPC to be set at runtime. This is essential for ...

supporting 64-bit CPUs, which often have 128-byte cache lines instead of the
standard 32.

2008-09-24 00:28:46 +00:00

..

clock.c

o In decr_get_timecount() only read the low timebase register.

2008-09-16 17:11:33 +00:00

copyinout.c

Fix remaining compile error.

2006-10-18 19:56:20 +00:00

interrupt.c

Trace interrupts with KTR_INTR.

2008-08-31 23:54:22 +00:00

locore.S

MFp4: SMP support

2008-04-27 22:33:43 +00:00

machdep.c

Allow the cacheline size on PowerPC to be set at runtime. This is essential for

2008-09-24 00:28:46 +00:00

mmu_oea.c

In preparation for PowerPC G5 support, allow PVO objects to contain page

2008-09-23 03:02:57 +00:00

mp_cpudep.c

Rewrite cpudep_ap_bootstrap(). We now enable L3, L2, L1D and L1I

2008-09-16 17:22:16 +00:00

nexus.c

Switch to using genclock. Have nexus double as clock device for

2008-04-21 04:41:37 +00:00

ofw_machdep.c

Remove SMP left-overs from NetBSD.

2008-02-12 20:55:51 +00:00

ofwmagic.S

…

swtch.S

Set pcpup->pc_curthread and pcpup->pc_curpcb before calling

2008-09-16 17:03:52 +00:00

trap_subr.S

Remove the tracing from the AP startup. The AP is known

2008-09-16 01:05:54 +00:00

trap.c

Add link register to fatal trap printout to better diagnose NULL

2008-06-04 07:32:49 +00:00

uio_machdep.c

Add kdb_cpu_sync_icache(), intended to synchronize instruction

2007-06-09 21:55:17 +00:00

uma_machdep.c

It has been observed on the mailing lists that the different categories

2007-09-15 18:47:02 +00:00

vm_machdep.c

Whitespace fixes.

2008-08-30 18:48:17 +00:00