338 lines
9.4 KiB
C
338 lines
9.4 KiB
C
/*
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* Copyright (c) 2000 Hans Petter Selasky. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*---------------------------------------------------------------------------
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*
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* i4b_ihfc.h - ihfc common header file
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* ------------------------------------
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*
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* last edit-date: [Wed Jul 19 09:40:45 2000]
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*
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* $Id: i4b_ihfc.h,v 1.9 2000/09/19 13:50:36 hm Exp $
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*
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* $FreeBSD$
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*
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*---------------------------------------------------------------------------*/
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#ifndef _I4B_IHFC_H_
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#define _I4B_IHFC_H_
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#include <i4b/include/i4b_l3l4.h>
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/*---------------------------------------------------------------------------*
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* global stuff (HFC-1/S/SP)
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*---------------------------------------------------------------------------*/
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#define DCH_MAX_LEN 264 /* max length of a D frame */
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#define IHFC_ACTIVATION_TIMEOUT 3*hz /* S0-bus must activate before this time */
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#define IHFC_IO_BASES 1
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#define IHFC_DISBUSYTO 500 /* do at least 500 inb's before giving up */
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#define IHFC_NONBUSYTO 8000 /* do at least 8000 inb's before giving up */
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#define IHFC_NTMODE 0 /* use TE-mode as default */
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#define IHFC_DLP 0 /* use (8/9) priority as default */
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#define IHFC_MAXUNIT 4
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/* #define IHFC_DEBUG internal debugging enabled *
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* #undef IHFC_DEBUG internal debugging disabled */
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/* chan: *
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* 0 - D1 (tx) *
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* 1 - D1 (rx) *
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* 2 - B1 (tx) *
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* 3 - B1 (rx) *
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* 4 - B2 (tx) *
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* 5 - B2 (rx) */
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#define HFC_1 0x01 /* HFC 2B */
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#define HFC_S 0x02 /* HFC - S 2BDS0 */
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#define HFC_SP 0x04 /* HFC - SP 2BDS0 */
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#define HFC_SPCI 0x08 /* HFC - SPCI 2BDS0 X */
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#define HFC_S2M 0x10 /* HFC - S2M 2BDS0 X */
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#define HFC_USB 0x20 /* HFC - USB 2BDS0 X */
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/*---------------------------------------------------------------------------*
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* "Help Fix Corruption" macros (HFC-1/S/SP)
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*
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* NOTE: If the code does not run at splhigh, we will sporadically
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* lose bytes. On fast PC's (200 Mhz), this is very little noticable.
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*---------------------------------------------------------------------------*/
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#define HFC_VAR int _s_ /* declare variable */
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#define HFC_BEG _s_ = splhigh() /* save spl */
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#define HFC_END splx(_s_) /* restore spl */
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/*---------------------------------------------------------------------------*
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* macros related to i4b linking (HFC-1/S/SP)
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*---------------------------------------------------------------------------*/
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#define S_BLINK sc->sc_blinktab[(chan > 3) ? 1 : 0]
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#define S_BDRVLINK sc->sc_bdrvlinktab[(chan > 3) ? 1 : 0]
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/*---------------------------------------------------------------------------*
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* macros related to ihfc_sc (HFC-1/S/SP)
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*---------------------------------------------------------------------------*/
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/* statemachine */
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#define S_IOM2 (sc->sc_config.i_adf2 & 0x80)
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/* 0x80: IOM2 mode selected */
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#define S_DLP (sc->sc_config.dlp)
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#define S_NTMODE (sc->sc_config.ntmode)
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#define S_STDEL (sc->sc_config.stdel)
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#define S_PHSTATE sc->sc_statemachine.state
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#define S_STM_T3 sc->sc_statemachine.T3
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#define S_STM_T3CALLOUT sc->sc_statemachine.T3callout
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/* unitnumbers */
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#define S_UNIT sc->sc_unit
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#define S_FLAG sc->sc_flag
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#define S_I4BUNIT sc->sc_i4bunit
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#define S_I4BFLAG sc->sc_i4bflag
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/* ISA bus setup */
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#define S_IOBASE sc->sc_resources.io_base
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#define S_IORID sc->sc_resources.io_rid
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#define S_IRQ sc->sc_resources.irq
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#define S_IRQRID sc->sc_resources.irq_rid
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/* hardware setup */
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#define S_HFC sc->sc_config.chiptype
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#define S_IIO sc->sc_config.iio
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#define S_IIRQ sc->sc_config.iirq
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/* registers of the HFC-S/SP (write only) */
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#define S_HFC_CONFIG sc->sc_config.cirm
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#define S_CIRM sc->sc_config.cirm
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#define S_CTMT sc->sc_config.ctmt
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#define S_TEST sc->sc_config.test
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#define S_SCTRL sc->sc_config.sctrl
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#define S_CLKDEL sc->sc_config.clkdel
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#define S_INT_M1 sc->sc_config.int_m1
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#define S_INT_M2 sc->sc_config.int_m2
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#define S_CONNECT sc->sc_config.connect
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#define S_SCTRL_R sc->sc_config.sctrl_r
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#define S_MST_MODE sc->sc_config.mst_mode
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/* registers of the HFC-S/SP (read only) */
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#define S_INT_S1 sc->sc_config.int_s1
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/* registers of the ISAC (write only) */
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#define S_ISAC_CONFIG sc->sc_config.i_adf2
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#define S_ADF1 sc->sc_config.i_adf1
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#define S_ADF2 sc->sc_config.i_adf2
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#define S_MASK sc->sc_config.i_mask
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#define S_MODE sc->sc_config.i_mode
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#define S_SPCR sc->sc_config.i_spcr
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#define S_SQXR sc->sc_config.i_sqxr
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#define S_STCR sc->sc_config.i_stcr
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#define S_STAR2 sc->sc_config.i_star2
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/* registers of the ISAC (read only) */
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#define S_ISTA sc->sc_config.i_ista
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/* state of the softc */
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#define S_ENABLED sc->sc_enabled
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#define S_INTR_ACTIVE sc->sc_intr_active
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/* SOFT-HDLC */
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#define S_HDLC_IB sc->sc_fifo.chan[chan].hdlc.ib /* u_short */
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#define S_HDLC_CRC sc->sc_fifo.chan[chan].hdlc.crc /* u_short */
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#define S_HDLC_TMP sc->sc_fifo.chan[chan].hdlc.tmp /* u_int */
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#define S_HDLC_FLAG sc->sc_fifo.chan[chan].hdlc.flag /* u_char */
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#define S_HDLC_BLEVEL sc->sc_fifo.chan[chan].hdlc.blevel /* u_short */
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/* stats */
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#define S_BYTES sc->sc_fifo.chan[chan].bytes
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/* "Z"-values */
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#define S_HDLC_DZ_TAB sc->sc_fifo.dztable
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/* filters */
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#define S_PROT sc->sc_fifo.chan[chan].prot
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#define S_FILTER sc->sc_fifo.chan[chan].filter
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#define S_ACTIVITY sc->sc_fifo.chan[chan].activity
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#define S_LAST_CHAN sc->sc_fifo.last_chan
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/* soft reset */
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#define RESET_SOFT_CHAN(sc, chan) bzero(&sc->sc_fifo.chan[chan], sizeof(sc->sc_fifo.chan[0]))
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/* trace */
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#define S_TRACE sc->sc_trace
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#define S_DTRACECOUNT sc->sc_Dtracecount
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#define S_BTRACECOUNT sc->sc_Btracecount
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/* mbuf */
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#define S_MBUF sc->sc_fifo.chan[chan].buffer.mbuf
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#define S_MBUFDUMMY sc->sc_fifo.chan[chan].buffer.mbufdummy
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#define S_MBUFLEN sc->sc_fifo.chan[chan].buffer.mbuf->m_len
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#define S_MBUFPKTHDR sc->sc_fifo.chan[chan].buffer.mbuf->m_pkthdr
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#define S_MBUFDATA sc->sc_fifo.chan[chan].buffer.mbuf->m_data
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#define S_MBUFDAT sc->sc_fifo.chan[chan].buffer.mbuf->m_dat
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#define S_IFQUEUE sc->sc_fifo.chan[chan].buffer.ifqueue
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/* hfc control */
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#define HFC_INIT ihfc_init
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#define HFC_INTR ((S_HFC & HFC_1) ? ihfc_intr1 : ihfc_intr2)
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#define HFC_FSM ihfc_fsm
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#define HFC_CONTROL ihfc_control
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/* softc parts */
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struct ihfc_sc;
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struct sc_resources {
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struct resource * io_base[IHFC_IO_BASES];
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int io_rid [IHFC_IO_BASES];
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struct resource * irq;
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int irq_rid;
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};
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struct hdlc {
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u_char flag;
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u_short blevel;
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u_short crc;
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u_short ib;
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u_int tmp;
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};
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struct buffer {
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struct ifqueue ifqueue; /* data queue */
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struct mbuf *mbuf; /* current mbuf */
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struct mbuf *mbufdummy; /* temporary */
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};
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struct chan {
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struct hdlc hdlc;
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u_int bytes;
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u_int prot;
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struct buffer buffer;
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void (*filter)(struct ihfc_sc *sc, u_char chan);
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};
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struct sc_fifo {
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struct chan chan[6];
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u_short dztable[16];
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u_char last_chan;
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};
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struct sc_config {
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/* software only: */
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u_short chiptype; /* chiptype (eg. HFC_1) */
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u_char dlp; /* D-priority */
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u_short iio; /* internal IO */
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u_char iirq; /* internal IRQ */
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u_char ntmode; /* mode */
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u_char stdel; /* S/T delay */
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/* write only: */
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u_char cirm;
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u_char ctmt;
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u_char int_m1;
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u_char int_m2;
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u_char mst_mode;
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u_char clkdel;
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u_char sctrl;
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u_char connect;
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u_char test;
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u_char sctrl_r;
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/* isac write only - hfc-1: */
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u_char i_adf2;
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u_char i_spcr;
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u_char i_sqxr;
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u_char i_adf1;
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u_char i_stcr;
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u_char i_mode;
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u_char i_mask;
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u_char i_star2;
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/* read only: */
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u_char int_s1;
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/* isac read only - hfc-1: */
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u_char i_ista;
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};
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struct sc_statemachine {
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u_char state; /* see i4b_ihfc_drv.h */
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u_char usync;
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u_char T3; /* T3 running */
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struct callout_handle T3callout;
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};
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/*---------------------------------------------------------------------------*
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* HFC softc
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*---------------------------------------------------------------------------*/
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typedef struct ihfc_sc
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{ int sc_unit;
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int sc_flag;
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int sc_i4bunit; /* L0IHFCUNIT(sc_unit) */
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int sc_i4bflag; /* FLAG_TEL_S0_16_3C .. */
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u_char sc_enabled; /* daemon running if set */
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u_char sc_intr_active; /* interrupt is active */
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int sc_trace;
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u_int sc_Btracecount;
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u_int sc_Dtracecount;
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struct sc_config sc_config;
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struct sc_resources sc_resources;
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struct sc_statemachine sc_statemachine;
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isdn_link_t sc_blinktab[2];
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drvr_link_t *sc_bdrvlinktab[2];
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struct sc_fifo sc_fifo;
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} ihfc_sc_t;
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extern ihfc_sc_t ihfc_softc[];
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#endif /* _I4B_IHFC_H_ */
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