4874af73c1
with geom_flashmap(4) and teach it about MMC for slicing enhanced user data area partitions. The FDT slicer still is the default for CFI, NAND and SPI flash on FDT-enabled platforms. - In addition to a device_t, also pass the name of the GEOM provider in question to the slicers as a single device may provide more than provider. - Build a geom_flashmap.ko. - Use MODULE_VERSION() so other modules can depend on geom_flashmap(4). - Remove redundant/superfluous GEOM routines that either do nothing or provide/just call default GEOM (slice) functionality. - Trim/adjust includes Submitted by: jhibbits (RouterBoard bits) Reviewed by: jhibbits
322 lines
7.9 KiB
C
322 lines
7.9 KiB
C
/*-
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* Copyright (C) 2015 Justin Hibbits
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/* RouterBoard 600/800 NAND controller driver. */
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/malloc.h>
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#include <sys/rman.h>
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#include <sys/slicer.h>
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#include <geom/geom_disk.h>
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#include <machine/bus.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <dev/nand/nand.h>
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#include <dev/nand/nandbus.h>
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#include <powerpc/mpc85xx/mpc85xx.h>
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#include "nfc_if.h"
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#include "gpio_if.h"
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#define RB_NAND_DATA (0x00)
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struct rb_nand_softc {
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struct nand_softc nand_dev;
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struct resource *sc_mem;
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int rid;
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device_t sc_gpio;
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uint32_t sc_rdy_pin;
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uint32_t sc_nce_pin;
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uint32_t sc_cle_pin;
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uint32_t sc_ale_pin;
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};
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static int rb_nand_attach(device_t);
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static int rb_nand_probe(device_t);
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static int rb_nand_send_command(device_t, uint8_t);
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static int rb_nand_send_address(device_t, uint8_t);
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static uint8_t rb_nand_read_byte(device_t);
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static void rb_nand_read_buf(device_t, void *, uint32_t);
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static void rb_nand_write_buf(device_t, void *, uint32_t);
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static int rb_nand_select_cs(device_t, uint8_t);
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static int rb_nand_read_rnb(device_t);
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static device_method_t rb_nand_methods[] = {
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DEVMETHOD(device_probe, rb_nand_probe),
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DEVMETHOD(device_attach, rb_nand_attach),
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DEVMETHOD(nfc_send_command, rb_nand_send_command),
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DEVMETHOD(nfc_send_address, rb_nand_send_address),
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DEVMETHOD(nfc_read_byte, rb_nand_read_byte),
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DEVMETHOD(nfc_read_buf, rb_nand_read_buf),
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DEVMETHOD(nfc_write_buf, rb_nand_write_buf),
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DEVMETHOD(nfc_select_cs, rb_nand_select_cs),
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DEVMETHOD(nfc_read_rnb, rb_nand_read_rnb),
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{ 0, 0 },
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};
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static driver_t rb_nand_driver = {
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"nand",
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rb_nand_methods,
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sizeof(struct rb_nand_softc),
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};
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static devclass_t rb_nand_devclass;
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DRIVER_MODULE(rb_nand, ofwbus, rb_nand_driver, rb_nand_devclass, 0, 0);
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#if 0
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static const struct nand_ecc_data rb_ecc = {
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.eccsize = 6,
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.eccmode = NAND_ECC_SOFT,
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.eccbytes = 6,
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.eccpositions = { 8, 9, 10, 13, 14, 15 },
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};
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#endif
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/* Slicer operates on the NAND controller, so we have to find the chip. */
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static int
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rb_nand_slicer(device_t dev, const char *provider __unused,
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struct flash_slice *slices, int *nslices)
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{
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struct nand_chip *chip;
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device_t *children;
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int n;
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if (device_get_children(dev, &children, &n) != 0) {
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panic("Slicer called on controller with no child!");
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}
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dev = children[0];
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free(children, M_TEMP);
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if (device_get_children(dev, &children, &n) != 0) {
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panic("Slicer called on controller with nandbus but no child!");
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}
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dev = children[0];
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free(children, M_TEMP);
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chip = device_get_softc(dev);
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*nslices = 2;
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slices[0].base = 0;
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slices[0].size = 4 * 1024 * 1024;
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slices[0].label = "boot";
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slices[1].base = 4 * 1024 * 1024;
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slices[1].size = chip->ndisk->d_mediasize - slices[0].size;
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slices[1].label = "rootfs";
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return (0);
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}
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static int
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rb_nand_probe(device_t dev)
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{
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const char *device_type;
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device_type = ofw_bus_get_type(dev);
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if (!device_type || strcmp(device_type, "rb,nand"))
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return (ENXIO);
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device_set_desc(dev, "RouterBoard 333/600/800 NAND controller");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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rb_nand_attach(device_t dev)
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{
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struct rb_nand_softc *sc;
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phandle_t node;
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uint32_t ale[2],cle[2],nce[2],rdy[2];
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u_long size,start;
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int err;
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sc = device_get_softc(dev);
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node = ofw_bus_get_node(dev);
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if (OF_getprop(node, "ale", ale, sizeof(ale)) <= 0) {
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return (ENXIO);
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}
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if (OF_getprop(node, "cle", cle, sizeof(cle)) <= 0) {
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return (ENXIO);
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}
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if (OF_getprop(node, "nce", nce, sizeof(nce)) <= 0) {
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return (ENXIO);
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}
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if (OF_getprop(node, "rdy", rdy, sizeof(rdy)) <= 0) {
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return (ENXIO);
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}
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if (ale[0] != cle[0] || ale[0] != nce[0] || ale[0] != rdy[0]) {
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device_printf(dev, "GPIO handles for signals must match.\n");
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return (ENXIO);
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}
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sc->sc_ale_pin = ale[1];
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sc->sc_cle_pin = cle[1];
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sc->sc_nce_pin = nce[1];
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sc->sc_rdy_pin = rdy[1];
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sc->sc_gpio = OF_device_from_xref(ale[0]);
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if (sc->sc_gpio == NULL) {
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device_printf(dev, "No GPIO resource found!\n");
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return (ENXIO);
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}
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sc->sc_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->rid,
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RF_ACTIVE);
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if (sc->sc_mem == NULL) {
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device_printf(dev, "could not allocate resources!\n");
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return (ENXIO);
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}
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start = rman_get_start(sc->sc_mem);
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size = rman_get_size(sc->sc_mem);
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if (law_enable(OCP85XX_TGTIF_LBC, start, size) != 0) {
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bus_release_resource(dev, SYS_RES_MEMORY, sc->rid, sc->sc_mem);
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device_printf(dev, "could not allocate local address window.\n");
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return (ENXIO);
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}
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flash_register_slicer(rb_nand_slicer, FLASH_SLICES_TYPE_NAND, TRUE);
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nand_init(&sc->nand_dev, dev, NAND_ECC_SOFT, 0, 0, NULL, NULL);
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err = nandbus_create(dev);
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return (err);
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}
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static int
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rb_nand_send_command(device_t dev, uint8_t command)
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{
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struct rb_nand_softc *sc;
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nand_debug(NDBG_DRV,"rb_nand: send command %x", command);
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sc = device_get_softc(dev);
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GPIO_PIN_SET(sc->sc_gpio, sc->sc_cle_pin, 1);
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GPIO_PIN_SET(sc->sc_gpio, sc->sc_ale_pin, 0);
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GPIO_PIN_SET(sc->sc_gpio, sc->sc_nce_pin, 0);
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bus_write_1(sc->sc_mem, RB_NAND_DATA, command);
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GPIO_PIN_SET(sc->sc_gpio, sc->sc_cle_pin, 0);
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return (0);
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}
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static int
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rb_nand_send_address(device_t dev, uint8_t addr)
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{
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struct rb_nand_softc *sc;
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nand_debug(NDBG_DRV,"rb_nand: send address %x", addr);
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sc = device_get_softc(dev);
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GPIO_PIN_SET(sc->sc_gpio, sc->sc_cle_pin, 0);
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GPIO_PIN_SET(sc->sc_gpio, sc->sc_ale_pin, 1);
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GPIO_PIN_SET(sc->sc_gpio, sc->sc_nce_pin, 0);
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bus_write_1(sc->sc_mem, RB_NAND_DATA, addr);
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GPIO_PIN_SET(sc->sc_gpio, sc->sc_ale_pin, 0);
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return (0);
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}
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static uint8_t
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rb_nand_read_byte(device_t dev)
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{
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struct rb_nand_softc *sc;
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uint8_t data;
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sc = device_get_softc(dev);
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data = bus_read_1(sc->sc_mem, RB_NAND_DATA);
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nand_debug(NDBG_DRV,"rb_nand: read %x", data);
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return (data);
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}
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static void
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rb_nand_read_buf(device_t dev, void* buf, uint32_t len)
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{
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struct rb_nand_softc *sc;
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sc = device_get_softc(dev);
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bus_read_region_1(sc->sc_mem, RB_NAND_DATA, buf, len);
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}
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static void
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rb_nand_write_buf(device_t dev, void* buf, uint32_t len)
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{
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struct rb_nand_softc *sc;
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int i;
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uint8_t *b = (uint8_t*)buf;
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sc = device_get_softc(dev);
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for (i = 0; i < len; i++) {
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#ifdef NAND_DEBUG
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if (!(i % 16))
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printf("%s", i == 0 ? "rb_nand:\n" : "\n");
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printf(" %x", b[i]);
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if (i == len - 1)
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printf("\n");
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#endif
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bus_write_1(sc->sc_mem, RB_NAND_DATA, b[i]);
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}
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}
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static int
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rb_nand_select_cs(device_t dev, uint8_t cs)
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{
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if (cs > 0)
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return (ENODEV);
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return (0);
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}
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static int
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rb_nand_read_rnb(device_t dev)
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{
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struct rb_nand_softc *sc;
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uint32_t rdy_bit;
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sc = device_get_softc(dev);
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GPIO_PIN_GET(sc->sc_gpio, sc->sc_rdy_pin, &rdy_bit);
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return (rdy_bit); /* ready */
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}
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