30f99dbeef
Sponsored by: Dell EMC Isilon
348 lines
12 KiB
C
348 lines
12 KiB
C
/*-
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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*
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* GPL LICENSE SUMMARY
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*
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* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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* The full GNU General Public License is included in this distribution
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* in the file called LICENSE.GPL.
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*
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* BSD LICENSE
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*
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* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _SCI_BASE_CONTROLLER_H_
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#define _SCI_BASE_CONTROLLER_H_
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/**
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* @file
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*
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* @brief This file contains all of the structures, constants, and methods
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* common to all controller object definitions.
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*/
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#ifdef __cplusplus
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extern "C" {
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#endif // __cplusplus
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#include <dev/isci/scil/intel_sas.h>
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#include <dev/isci/scil/sci_controller_constants.h>
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#include <dev/isci/scil/sci_base_object.h>
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#include <dev/isci/scil/sci_base_state.h>
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#include <dev/isci/scil/sci_base_logger.h>
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#include <dev/isci/scil/sci_base_memory_descriptor_list.h>
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#include <dev/isci/scil/sci_base_state_machine.h>
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#include <dev/isci/scil/sci_base_state_machine_logger.h>
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/**
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* @enum SCI_BASE_CONTROLLER_STATES
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*
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* @brief This enumeration depicts all the states for the common controller
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* state machine.
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*/
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typedef enum _SCI_BASE_CONTROLLER_STATES
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{
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/**
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* Simply the initial state for the base controller state machine.
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*/
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SCI_BASE_CONTROLLER_STATE_INITIAL = 0,
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/**
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* This state indicates that the controller is reset. The memory for
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* the controller is in its initial state, but the controller requires
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* initialization.
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* This state is entered from the INITIAL state.
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* This state is entered from the RESETTING state.
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*/
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SCI_BASE_CONTROLLER_STATE_RESET,
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/**
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* This state is typically an action state that indicates the controller
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* is in the process of initialization. In this state no new IO operations
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* are permitted.
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* This state is entered from the RESET state.
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*/
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SCI_BASE_CONTROLLER_STATE_INITIALIZING,
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/**
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* This state indicates that the controller has been successfully
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* initialized. In this state no new IO operations are permitted.
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* This state is entered from the INITIALIZING state.
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*/
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SCI_BASE_CONTROLLER_STATE_INITIALIZED,
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/**
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* This state indicates the controller is in the process of becoming
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* ready (i.e. starting). In this state no new IO operations are permitted.
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* This state is entered from the INITIALIZED state.
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*/
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SCI_BASE_CONTROLLER_STATE_STARTING,
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/**
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* This state indicates the controller is now ready. Thus, the user
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* is able to perform IO operations on the controller.
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* This state is entered from the STARTING state.
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*/
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SCI_BASE_CONTROLLER_STATE_READY,
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/**
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* This state is typically an action state that indicates the controller
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* is in the process of resetting. Thus, the user is unable to perform
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* IO operations on the controller. A reset is considered destructive in
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* most cases.
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* This state is entered from the READY state.
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* This state is entered from the FAILED state.
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* This state is entered from the STOPPED state.
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*/
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SCI_BASE_CONTROLLER_STATE_RESETTING,
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/**
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* This state indicates that the controller is in the process of stopping.
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* In this state no new IO operations are permitted, but existing IO
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* operations are allowed to complete.
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* This state is entered from the READY state.
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*/
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SCI_BASE_CONTROLLER_STATE_STOPPING,
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/**
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* This state indicates that the controller has successfully been stopped.
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* In this state no new IO operations are permitted.
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* This state is entered from the STOPPING state.
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*/
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SCI_BASE_CONTROLLER_STATE_STOPPED,
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/**
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* This state indicates that the controller could not successfully be
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* initialized. In this state no new IO operations are permitted.
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* This state is entered from the INITIALIZING state.
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* This state is entered from the STARTING state.
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* This state is entered from the STOPPING state.
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* This state is entered from the RESETTING state.
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*/
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SCI_BASE_CONTROLLER_STATE_FAILED,
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SCI_BASE_CONTROLLER_MAX_STATES
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} SCI_BASE_CONTROLLER_STATES;
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/**
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* @struct SCI_BASE_CONTROLLER
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*
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* @brief The base controller object abstracts the fields common to all
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* SCI controller objects.
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*/
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typedef struct SCI_BASE_CONTROLLER
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{
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/**
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* The field specifies that the parent object for the base controller
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* is the base object itself.
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*/
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SCI_BASE_OBJECT_T parent;
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/**
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* This field points to the memory descriptor list associated with this
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* controller. The MDL indicates the memory requirements necessary for
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* this controller object.
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*/
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SCI_BASE_MEMORY_DESCRIPTOR_LIST_T mdl;
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/**
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* This field records the fact that the controller has encountered a fatal memory
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* error and controller must stay in failed state.
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*/
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U8 error;
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/**
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* This field contains the information for the base controller state
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* machine.
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*/
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SCI_BASE_STATE_MACHINE_T state_machine;
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#ifdef SCI_LOGGING
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SCI_BASE_STATE_MACHINE_LOGGER_T state_machine_logger;
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#endif // SCI_LOGGING
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} SCI_BASE_CONTROLLER_T;
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// Forward declarations
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struct SCI_BASE_REMOTE_DEVICE;
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struct SCI_BASE_REQUEST;
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typedef SCI_STATUS (*SCI_BASE_CONTROLLER_HANDLER_T)(
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SCI_BASE_CONTROLLER_T *
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);
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typedef SCI_STATUS (*SCI_BASE_CONTROLLER_TIMED_HANDLER_T)(
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SCI_BASE_CONTROLLER_T *,
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U32
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);
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typedef SCI_STATUS (*SCI_BASE_CONTROLLER_REQUEST_HANDLER_T)(
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SCI_BASE_CONTROLLER_T *,
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struct SCI_BASE_REMOTE_DEVICE *,
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struct SCI_BASE_REQUEST *
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);
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typedef SCI_STATUS (*SCI_BASE_CONTROLLER_START_REQUEST_HANDLER_T)(
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SCI_BASE_CONTROLLER_T *,
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struct SCI_BASE_REMOTE_DEVICE *,
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struct SCI_BASE_REQUEST *,
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U16
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);
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/**
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* @struct SCI_BASE_CONTROLLER_STATE_HANDLER
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*
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* @brief This structure contains all of the state handler methods common to
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* base controller state machines. Handler methods provide the ability
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* to change the behavior for user requests or transitions depending
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* on the state the machine is in.
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*/
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typedef struct SCI_BASE_CONTROLLER_STATE_HANDLER
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{
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/**
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* The start_handler specifies the method invoked when a user attempts to
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* start a controller.
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*/
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SCI_BASE_CONTROLLER_TIMED_HANDLER_T start_handler;
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/**
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* The stop_handler specifies the method invoked when a user attempts to
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* stop a controller.
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*/
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SCI_BASE_CONTROLLER_TIMED_HANDLER_T stop_handler;
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/**
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* The reset_handler specifies the method invoked when a user attempts to
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* reset a controller.
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*/
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SCI_BASE_CONTROLLER_HANDLER_T reset_handler;
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/**
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* The initialize_handler specifies the method invoked when a user
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* attempts to initialize a controller.
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*/
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SCI_BASE_CONTROLLER_HANDLER_T initialize_handler;
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/**
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* The start_io_handler specifies the method invoked when a user
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* attempts to start an IO request for a controller.
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*/
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SCI_BASE_CONTROLLER_START_REQUEST_HANDLER_T start_io_handler;
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/**
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* The start_internal_request_handler specifies the method invoked when a user
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* attempts to start an internal request for a controller.
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*/
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SCI_BASE_CONTROLLER_START_REQUEST_HANDLER_T start_high_priority_io_handler;
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/**
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* The complete_io_handler specifies the method invoked when a user
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* attempts to complete an IO request for a controller.
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*/
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SCI_BASE_CONTROLLER_REQUEST_HANDLER_T complete_io_handler;
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/**
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* The complete_high_priority_io_handler specifies the method invoked when a user
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* attempts to complete a high priority IO request for a controller.
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*/
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SCI_BASE_CONTROLLER_REQUEST_HANDLER_T complete_high_priority_io_handler;
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/**
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* The continue_io_handler specifies the method invoked when a user
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* attempts to continue an IO request for a controller.
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*/
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SCI_BASE_CONTROLLER_REQUEST_HANDLER_T continue_io_handler;
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/**
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* The start_task_handler specifies the method invoked when a user
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* attempts to start a task management request for a controller.
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*/
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SCI_BASE_CONTROLLER_START_REQUEST_HANDLER_T start_task_handler;
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/**
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* The complete_task_handler specifies the method invoked when a user
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* attempts to complete a task management request for a controller.
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*/
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SCI_BASE_CONTROLLER_REQUEST_HANDLER_T complete_task_handler;
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} SCI_BASE_CONTROLLER_STATE_HANDLER_T;
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/**
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* @brief Construct the base controller
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*
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* @param[in] this_controller This parameter specifies the base controller
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* to be constructed.
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* @param[in] logger This parameter specifies the logger associated with
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* this base controller object.
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* @param[in] state_table This parameter specifies the table of state
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* definitions to be utilized for the controller state machine.
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* @param[in] mde_array This parameter specifies the array of memory
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* descriptor entries to be managed by this list.
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* @param[in] mde_array_length This parameter specifies the size of the
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* array of entries.
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* @param[in] next_mdl This parameter specifies a subsequent MDL object
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* to be managed by this MDL object.
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* @param[in] oem_parameters This parameter specifies the original
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* equipment manufacturer parameters to be utilized by this
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* controller object.
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*
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* @return none
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*/
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void sci_base_controller_construct(
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SCI_BASE_CONTROLLER_T * this_controller,
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SCI_BASE_LOGGER_T * logger,
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SCI_BASE_STATE_T * state_table,
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SCI_PHYSICAL_MEMORY_DESCRIPTOR_T * mdes,
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U32 mde_count,
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SCI_MEMORY_DESCRIPTOR_LIST_HANDLE_T next_mdl
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);
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#ifdef __cplusplus
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}
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#endif // __cplusplus
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#endif // _SCI_BASE_CONTROLLER_H_
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