4d7bb3e81a
Reviewed by: cognet Approved by: cognet
423 lines
10 KiB
C
423 lines
10 KiB
C
/*-
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* Copyright (c) 2003-2004 Poul-Henning Kamp
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The names of the authors may not be used to endorse or promote
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* products derived from this software without specific prior written
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* permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* This is a device driver or the Adlink 9812 and 9810 ADC cards, mainly
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* intended to support Software Defined Radio reception of timesignals
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* in the VLF band. See http://phk.freebsd.dk/loran-c
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*
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* The driver is configured with ioctls which define a ringbuffer with
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* a given number of chunks in it. The a control structure and the
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* ringbuffer can then be mmap(2)'ed into userland and the application
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* can operate on the data directly.
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*
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* Tested with 10MHz external clock, divisor of 2 (ie: 5MHz sampling),
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* One channel active (ie: 2 bytes per sample = 10MB/sec) on a 660MHz
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* Celeron PC.
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*
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*/
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#ifdef _KERNEL
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/malloc.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/kthread.h>
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#include <sys/conf.h>
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#include <sys/bus.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <sys/rman.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <pci_if.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#endif /* _KERNEL */
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#include <sys/ioccom.h>
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#define ADLINK_SETDIVISOR _IOWR('A', 255, u_int) /* divisor */
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#define ADLINK_SETCHUNKSIZE _IOWR('A', 254, u_int) /* bytes */
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#define ADLINK_SETRINGSIZE _IOWR('A', 253, u_int) /* bytes */
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#define ADLINK_START _IOWR('A', 252, u_int) /* dummy */
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#define ADLINK_STOP _IOWR('A', 251, u_int) /* dummy */
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#define ADLINK_RESET _IOWR('A', 250, u_int) /* dummy */
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struct page0 {
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u_int version;
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int state;
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# define STATE_RESET -1
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# define STATE_RUN 0
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u_int divisor; /* int */
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u_int chunksize; /* bytes */
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u_int ringsize; /* chunks */
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u_int o_sample; /*
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* offset of ring generation
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* array
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*/
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u_int o_ring; /* offset of ring */
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};
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#define PAGE0VERSION 20050219
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#ifdef _KERNEL
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struct pgstat {
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uint64_t *sample;
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vm_paddr_t phys;
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void *virt;
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struct pgstat *next;
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};
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struct softc {
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device_t device;
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void *intrhand;
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struct resource *res[3];
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struct cdev *dev;
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off_t mapvir;
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int error;
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struct page0 *p0;
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u_int nchunks;
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struct pgstat *chunks;
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struct pgstat *next;
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uint64_t sample;
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};
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static d_ioctl_t adlink_ioctl;
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static d_mmap_t adlink_mmap;
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static int adlink_intr(void *arg);
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static struct cdevsw adlink_cdevsw = {
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.d_version = D_VERSION,
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.d_flags = D_NEEDGIANT,
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.d_ioctl = adlink_ioctl,
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.d_mmap = adlink_mmap,
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.d_name = "adlink",
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};
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static int
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adlink_intr(void *arg)
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{
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struct softc *sc;
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struct pgstat *pg;
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uint32_t u;
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sc = arg;
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u = bus_read_4(sc->res[0], 0x38);
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if (!(u & 0x00800000))
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return; // XXX - FILTER_STRAY?
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bus_write_4(sc->res[0], 0x38, u | 0x003f4000);
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sc->sample += sc->p0->chunksize / 2;
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pg = sc->next;
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*(pg->sample) = sc->sample;
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u = bus_read_4(sc->res[1], 0x18);
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if (u & 1)
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sc->p0->state = EIO;
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if (sc->p0->state != STATE_RUN) {
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printf("adlink: stopping %d\n", sc->p0->state);
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return; // XXX - FILTER_STRAY?
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}
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pg = pg->next;
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sc->next = pg;
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*(pg->sample) = 0;
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bus_write_4(sc->res[0], 0x24, pg->phys);
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bus_write_4(sc->res[0], 0x28, sc->p0->chunksize);
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wakeup(sc);
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return (FILTER_HANDLED);
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}
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static int
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adlink_mmap(struct cdev *dev, vm_ooffset_t offset, vm_paddr_t *paddr,
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int nprot, vm_memattr_t *memattr)
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{
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struct softc *sc;
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vm_offset_t o;
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int i;
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struct pgstat *pg;
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sc = dev->si_drv1;
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if (nprot != VM_PROT_READ)
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return (-1);
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if (offset == 0) {
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*paddr = vtophys(sc->p0);
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return (0);
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}
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o = PAGE_SIZE;
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pg = sc->chunks;
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for (i = 0; i < sc->nchunks; i++, pg++) {
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if (offset - o >= sc->p0->chunksize) {
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o += sc->p0->chunksize;
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continue;
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}
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*paddr = pg->phys + (offset - o);
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return (0);
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}
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return (-1);
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}
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static int
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adlink_ioctl(struct cdev *dev, u_long cmd, caddr_t data, int fflag, struct thread *td)
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{
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struct softc *sc;
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int i, error;
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u_int u;
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struct pgstat *pg;
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uint64_t *sample;
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sc = dev->si_drv1;
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u = *(u_int*)data;
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error = 0;
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switch (cmd) {
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case ADLINK_SETDIVISOR:
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if (sc->p0->state == STATE_RUN)
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return (EBUSY);
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if (u & 1)
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return (EINVAL);
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sc->p0->divisor = u;
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break;
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case ADLINK_SETCHUNKSIZE:
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if (sc->p0->state != STATE_RESET)
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return (EBUSY);
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if (u % PAGE_SIZE)
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return (EINVAL);
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if (sc->p0->ringsize != 0 && sc->p0->ringsize % u)
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return (EINVAL);
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sc->p0->chunksize = u;
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break;
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case ADLINK_SETRINGSIZE:
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if (sc->p0->state != STATE_RESET)
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return (EBUSY);
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if (u % PAGE_SIZE)
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return (EINVAL);
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if (sc->p0->chunksize != 0 && u % sc->p0->chunksize)
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return (EINVAL);
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sc->p0->ringsize = u;
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break;
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case ADLINK_START:
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if (sc->p0->state == STATE_RUN)
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return (EBUSY);
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if (sc->p0->state == STATE_RESET) {
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if (sc->p0->chunksize == 0)
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sc->p0->chunksize = 4 * PAGE_SIZE;
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if (sc->p0->ringsize == 0)
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sc->p0->ringsize = 16 * sc->p0->chunksize;
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if (sc->p0->divisor == 0)
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sc->p0->divisor = 4;
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sc->nchunks = sc->p0->ringsize / sc->p0->chunksize;
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if (sc->nchunks * sizeof (*pg->sample) +
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sizeof *sc->p0 > PAGE_SIZE)
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return (EINVAL);
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sc->p0->o_ring = PAGE_SIZE;
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sample = (uint64_t *)(sc->p0 + 1);
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sc->p0->o_sample =
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(uintptr_t)sample - (uintptr_t)(sc->p0);
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pg = malloc(sizeof *pg * sc->nchunks,
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M_DEVBUF, M_WAITOK | M_ZERO);
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sc->chunks = pg;
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for (i = 0; i < sc->nchunks; i++) {
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pg->sample = sample;
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*pg->sample = 0;
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sample++;
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pg->virt = contigmalloc(sc->p0->chunksize,
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M_DEVBUF, M_WAITOK,
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0ul, 0xfffffffful,
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PAGE_SIZE, 0);
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pg->phys = vtophys(pg->virt);
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if (i == sc->nchunks - 1)
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pg->next = sc->chunks;
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else
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pg->next = pg + 1;
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pg++;
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}
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sc->next = sc->chunks;
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}
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/* Reset generation numbers */
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pg = sc->chunks;
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for (i = 0; i < sc->nchunks; i++) {
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*pg->sample = 0;
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pg++;
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}
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/* Enable interrupts on write complete */
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bus_write_4(sc->res[0], 0x38, 0x00004000);
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/* Sample CH0 only */
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bus_write_4(sc->res[1], 0x00, 1);
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/* Divide clock by four */
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bus_write_4(sc->res[1], 0x04, sc->p0->divisor);
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/* Software trigger mode: software */
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bus_write_4(sc->res[1], 0x08, 0);
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/* Trigger level zero */
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bus_write_4(sc->res[1], 0x0c, 0);
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/* Trigger source CH0 (not used) */
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bus_write_4(sc->res[1], 0x10, 0);
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/* Fifo control/status: flush */
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bus_write_4(sc->res[1], 0x18, 3);
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/* Clock source: external sine */
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bus_write_4(sc->res[1], 0x20, 2);
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/* Chipmunks are go! */
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sc->p0->state = STATE_RUN;
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/* Set up Write DMA */
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pg = sc->next = sc->chunks;
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*(pg->sample) = 0;
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bus_write_4(sc->res[0], 0x24, pg->phys);
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bus_write_4(sc->res[0], 0x28, sc->p0->chunksize);
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u = bus_read_4(sc->res[0], 0x3c);
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bus_write_4(sc->res[0], 0x3c, u | 0x00000600);
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/* Acquisition Enable Register: go! */
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bus_write_4(sc->res[1], 0x1c, 1);
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break;
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case ADLINK_STOP:
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if (sc->p0->state == STATE_RESET)
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break;
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sc->p0->state = EINTR;
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while (*(sc->next->sample) == 0)
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tsleep(sc, PUSER | PCATCH, "adstop", 1);
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break;
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#ifdef notyet
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/*
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* I'm not sure we can actually do this. How do we revoke
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* the mmap'ed pages from any process having them mmapped ?
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*/
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case ADLINK_RESET:
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if (sc->p0->state == STATE_RESET)
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break;
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sc->p0->state = EINTR;
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while (*(sc->next->samp) == 0)
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tsleep(sc, PUSER | PCATCH, "adreset", 1);
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/* deallocate ring buffer */
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break;
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#endif
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default:
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error = ENOIOCTL;
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break;
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}
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return (error);
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}
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static devclass_t adlink_devclass;
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static int
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adlink_probe(device_t self)
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{
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if (pci_get_devid(self) != 0x80da10e8)
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return (ENXIO);
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device_set_desc(self, "Adlink PCI-9812 4 ch 12 bit 20 msps");
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return (BUS_PROBE_DEFAULT);
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}
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static struct resource_spec adlink_res_spec[] = {
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{ SYS_RES_IOPORT, PCIR_BAR(0), RF_ACTIVE},
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{ SYS_RES_IOPORT, PCIR_BAR(1), RF_ACTIVE},
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{ SYS_RES_IRQ, 0, RF_ACTIVE | RF_SHAREABLE},
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{ -1, 0, 0 }
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};
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static int
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adlink_attach(device_t self)
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{
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struct softc *sc;
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int i, error;
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sc = device_get_softc(self);
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bzero(sc, sizeof *sc);
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sc->device = self;
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error = bus_alloc_resources(self, adlink_res_spec, sc->res);
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if (error)
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return (error);
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i = bus_setup_intr(self, sc->res[2], INTR_TYPE_MISC,
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adlink_intr, NULL, sc, &sc->intrhand);
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if (i) {
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printf("adlink: Couldn't get FAST intr\n");
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i = bus_setup_intr(self, sc->res[2],
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INTR_MPSAFE | INTR_TYPE_MISC,
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NULL, (driver_intr_t *)adlink_intr, sc, &sc->intrhand);
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}
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if (i) {
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bus_release_resources(self, adlink_res_spec, sc->res);
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return (ENODEV);
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}
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sc->p0 = malloc(PAGE_SIZE, M_DEVBUF, M_WAITOK | M_ZERO);
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sc->p0->version = PAGE0VERSION;
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sc->p0->state = STATE_RESET;
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sc->dev = make_dev(&adlink_cdevsw, device_get_unit(self),
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UID_ROOT, GID_WHEEL, 0444, "adlink%d", device_get_unit(self));
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sc->dev->si_drv1 = sc;
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return (0);
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}
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static device_method_t adlink_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, adlink_probe),
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DEVMETHOD(device_attach, adlink_attach),
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DEVMETHOD(device_suspend, bus_generic_suspend),
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DEVMETHOD(device_resume, bus_generic_resume),
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DEVMETHOD(device_shutdown, bus_generic_shutdown),
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DEVMETHOD_END
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};
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static driver_t adlink_driver = {
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"adlink",
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adlink_methods,
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sizeof(struct softc)
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};
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DRIVER_MODULE(adlink, pci, adlink_driver, adlink_devclass, 0, 0);
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#endif /* _KERNEL */
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