8e7c909559
SoCs and various chips (including, famously, their wifi chips.) This is "just" (all 20,000 lines of it) code to enumerate the various versions of busses inside these devices, including the PCI bridge and the direct SIBA bridge found in MIPS chips. It also includes shared code for some bus operations (suspend, resume, etc); EEPROM/SROM/etc parsing and other things that are shared between chips. Eventually this'll replace the code that bwi/bwn uses for the internal bus, as well as some apparently upcoming mips74k broadcom SoC support which uses bwn! Thanks to Landon Fuller <landonf@landonf.org> for all this work! Obtained from: https://github.com/landonf/freebsd/compare/user/landonf/bcm4331-CURRENT
95 lines
3.2 KiB
C
95 lines
3.2 KiB
C
/*-
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* Copyright (c) 2015 Landon Fuller <landon@landonf.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer,
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* without modification.
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* 2. Redistributions in binary form must reproduce at minimum a disclaimer
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* similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
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* redistribution must be conditioned upon including a substantially
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* similar Disclaimer requirement for further binary redistribution.
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*
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* NO WARRANTY
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
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* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
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* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
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* IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGES.
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*
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* $FreeBSD$
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*/
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#ifndef _BHND_BHNDBVAR_H_
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#define _BHND_BHNDBVAR_H_
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#include <sys/param.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/lock.h>
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#include <sys/malloc.h>
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#include <sys/mutex.h>
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#include <sys/rman.h>
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#include <dev/bhnd/bhndvar.h>
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#include "bhndb.h"
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#include "bhndb_if.h"
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/*
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* Definitions shared by bhndb(4) driver implementations.
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*/
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DECLARE_CLASS(bhndb_driver);
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struct bhndb_resources;
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int bhndb_attach(device_t dev, bhnd_devclass_t bridge_devclass);
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int bhndb_generic_probe(device_t dev);
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int bhndb_generic_detach(device_t dev);
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int bhndb_generic_suspend(device_t dev);
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int bhndb_generic_resume(device_t dev);
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int bhndb_generic_init_full_config(device_t dev, device_t child,
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const struct bhndb_hw_priority *hw_prio_table);
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int bhnd_generic_br_suspend_child(device_t dev, device_t child);
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int bhnd_generic_br_resume_child(device_t dev, device_t child);
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/** bhndb child instance state */
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struct bhndb_devinfo {
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struct resource_list resources; /**< child resources. */
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};
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/**
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* bhndb driver instance state. Must be first member of all subclass
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* softc structures.
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*/
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struct bhndb_softc {
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device_t dev; /**< bridge device */
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struct bhnd_chipid chipid; /**< chip identification */
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bhnd_devclass_t bridge_class; /**< bridge core type */
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device_t parent_dev; /**< parent device */
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device_t bus_dev; /**< child bhnd(4) bus */
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device_t hostb_dev; /**< child host bridge device, or NULL
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if the @p bus_dev has not yet
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called BHNDB_INIT_FULL_CONFIG() */
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struct rman mem_rman; /**< bridged bus memory manager */
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struct mtx sc_mtx; /**< resource lock. */
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struct bhndb_resources *bus_res; /**< bus resource state */
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};
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#endif /* _BHND_BHNDBVAR_H_ */
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