Justin Hibbits 5d89896cbf Add support for new LAW registers in QorIQ SoCs. ...

QorIQ SoCs (e5500 core, P5 family) have 2 BARs for local access windows, while
MPC85XX, and P1/P2 families use only a single BAR register.

This also adds the QORIQ_DPAA option, mutually exclusive to MPC85XX, to handle
this difference.

Obtained from:	Semihalf
Sponsored by:	Alex Perez/Inertial Computing

2015-11-18 01:54:19 +00:00

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atpic.c

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ds1553_bus_fdt.c

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ds1553_core.c

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ds1553_reg.h

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fsl_sdhc.c

Fix freescale sdhc driver, and add it to the files list.

2015-08-27 03:47:56 +00:00

fsl_sdhc.h

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i2c.c

Use IIC_EBUSBSY and IIC_BUSERR status values consistantly across all drivers.

2015-10-09 22:49:50 +00:00

isa.c

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lbc.c

Move Open Firmware device root on PowerPC, ARM, and MIPS systems to

2014-02-05 14:44:22 +00:00

lbc.h

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mpc85xx_gpio.c

Add a GPIO driver for the mpc85xx.

2015-04-04 02:34:40 +00:00

mpc85xx.c

Add support for new LAW registers in QorIQ SoCs.

2015-11-18 01:54:19 +00:00

mpc85xx.h

Add support for new LAW registers in QorIQ SoCs.

2015-11-18 01:54:19 +00:00

pci_mpc85xx_pcib.c

Remove debug printf.

2015-08-19 13:23:07 +00:00

pci_mpc85xx.c

Use 64-bit addresses for configuring inbound and outbound address windows.

2015-11-03 00:54:14 +00:00

platform_mpc85xx.c

Make the mpc85xx platform a kobj base class.

2015-08-22 03:29:12 +00:00