marcel 8b09116a5a Add cpu_flush_dcache() for use after non-DMA based I/O so that a ... possible future I-cache coherency operation can succeed. On ARM for example the L1 cache can be (is) virtually mapped, which means that any I/O that uses temporary mappings will not see the I-cache made coherent. On ia64 a similar behaviour has been observed. By flushing the D-cache, execution of binaries backed by md(4) and/or NFS work reliably. For Book-E (powerpc), execution over NFS exhibits SIGILL once in a while as well, though cpu_flush_dcache() hasn't been implemented yet. Doing an explicit D-cache flush as part of the non-DMA based I/O read operation eliminates the need to do it as part of the I-cache coherency operation itself and as such avoids pessimizing the DMA-based I/O read operations for which D-cache are already flushed/invalidated. It also allows future optimizations whereby the bcopy() followed by the D-cache flush can be integrated in a single operation, which could be implemented using on-chips DMA engines, by-passing the D-cache altogether.		2009-05-18 18:37:18 +00:00
..
central	Hook up the generic OFW pnpinfo string method.	2009-03-19 21:14:45 +00:00
compile
conf	- Use "device\t" and "options \t" for consistency.	2009-05-10 00:00:25 +00:00
ebus	- Sort device methods.	2009-03-19 20:31:55 +00:00
fhc	Hook up the generic OFW pnpinfo string method.	2009-03-19 21:14:45 +00:00
include	Don't conditionally define CACHE_LINE_SHIFT, as we anticipate sizing	2009-04-20 12:59:23 +00:00
isa	Add device found in B100.	2009-03-19 20:57:59 +00:00
pci	Bring the implementation of the pnpinfo string function more in	2009-03-19 21:12:44 +00:00
sbus	Hook up the generic OFW pnpinfo string method.	2009-03-19 21:14:45 +00:00
sparc64	Add cpu_flush_dcache() for use after non-DMA based I/O so that a	2009-05-18 18:37:18 +00:00