e44e1c10f7
and start teaching subsystems about it. The Atheros MIPS platforms don't guarantee any kind of FIFO consistency with interrupts in hardware. So software needs to do a flush when it receives an interrupt and before it calls the interrupt handler. There are new ones for the QCA934x and QCA955x, so do a few things: * Get rid of the individual ones (for ethernet and IP2); * Create a mux and enum listing all the variations on DDR flushes; * replace the uses of IP2 with the relevant one (which will typically be "PCI" here); * call the USB DDR flush before calling the real USB interrupt handlers; * call the ethernet one upon receiving an interrupt that's for us, rather than never calling it during operation. Tested: * QCA9558 (TP-Link archer c7 v2) * AR9331 (Carambola 2) TODO: * PCI, USB, ethernet, etc need to do a double-check to see if the interrupt was truely for them before doing the DDR. For now I prefer "correct" over "fast".
227 lines
6.3 KiB
C
227 lines
6.3 KiB
C
/*-
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* Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice unmodified, this list of conditions, and the following
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* disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/rman.h>
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#include <sys/condvar.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <dev/usb/usb.h>
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#include <dev/usb/usbdi.h>
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#include <dev/usb/usb_core.h>
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#include <dev/usb/usb_busdma.h>
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#include <dev/usb/usb_process.h>
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#include <dev/usb/usb_util.h>
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#include <dev/usb/usb_controller.h>
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#include <dev/usb/usb_bus.h>
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#include <dev/usb/controller/ohci.h>
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#include <dev/usb/controller/ohcireg.h>
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#include <mips/atheros/ar71xxreg.h> /* for stuff in ar71xx_cpudef.h */
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#include <mips/atheros/ar71xx_cpudef.h>
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static int ar71xx_ohci_attach(device_t dev);
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static int ar71xx_ohci_detach(device_t dev);
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static int ar71xx_ohci_probe(device_t dev);
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struct ar71xx_ohci_softc
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{
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struct ohci_softc sc_ohci;
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};
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static int
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ar71xx_ohci_probe(device_t dev)
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{
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device_set_desc(dev, "AR71XX integrated OHCI controller");
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return (BUS_PROBE_DEFAULT);
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}
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static void
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ar71xx_ohci_intr(void *arg)
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{
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/* XXX TODO: should really see if this was our interrupt.. */
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ar71xx_device_flush_ddr(AR71XX_CPU_DDR_FLUSH_USB);
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ohci_interrupt(arg);
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}
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static int
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ar71xx_ohci_attach(device_t dev)
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{
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struct ar71xx_ohci_softc *sc = device_get_softc(dev);
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int err;
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int rid;
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/* initialise some bus fields */
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sc->sc_ohci.sc_bus.parent = dev;
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sc->sc_ohci.sc_bus.devices = sc->sc_ohci.sc_devices;
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sc->sc_ohci.sc_bus.devices_max = OHCI_MAX_DEVICES;
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sc->sc_ohci.sc_bus.dma_bits = 32;
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/* get all DMA memory */
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if (usb_bus_mem_alloc_all(&sc->sc_ohci.sc_bus,
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USB_GET_DMA_TAG(dev), &ohci_iterate_hw_softc)) {
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return (ENOMEM);
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}
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sc->sc_ohci.sc_dev = dev;
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rid = 0;
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sc->sc_ohci.sc_io_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
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RF_ACTIVE);
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if (sc->sc_ohci.sc_io_res == NULL) {
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err = ENOMEM;
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goto error;
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}
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sc->sc_ohci.sc_io_tag = rman_get_bustag(sc->sc_ohci.sc_io_res);
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sc->sc_ohci.sc_io_hdl = rman_get_bushandle(sc->sc_ohci.sc_io_res);
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sc->sc_ohci.sc_io_size = rman_get_size(sc->sc_ohci.sc_io_res);
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rid = 0;
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sc->sc_ohci.sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
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RF_ACTIVE);
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if (sc->sc_ohci.sc_irq_res == NULL) {
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err = ENOMEM;
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goto error;
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}
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sc->sc_ohci.sc_bus.bdev = device_add_child(dev, "usbus", -1);
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if (sc->sc_ohci.sc_bus.bdev == NULL) {
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err = ENOMEM;
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goto error;
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}
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device_set_ivars(sc->sc_ohci.sc_bus.bdev, &sc->sc_ohci.sc_bus);
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err = bus_setup_intr(dev, sc->sc_ohci.sc_irq_res,
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INTR_TYPE_BIO | INTR_MPSAFE, NULL,
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ar71xx_ohci_intr, sc, &sc->sc_ohci.sc_intr_hdl);
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if (err) {
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err = ENXIO;
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goto error;
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}
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strlcpy(sc->sc_ohci.sc_vendor, "Atheros", sizeof(sc->sc_ohci.sc_vendor));
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bus_space_write_4(sc->sc_ohci.sc_io_tag, sc->sc_ohci.sc_io_hdl, OHCI_CONTROL, 0);
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err = ohci_init(&sc->sc_ohci);
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if (!err)
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err = device_probe_and_attach(sc->sc_ohci.sc_bus.bdev);
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if (err)
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goto error;
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return (0);
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error:
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if (err) {
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ar71xx_ohci_detach(dev);
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return (err);
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}
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return (err);
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}
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static int
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ar71xx_ohci_detach(device_t dev)
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{
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struct ar71xx_ohci_softc *sc = device_get_softc(dev);
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device_t bdev;
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if (sc->sc_ohci.sc_bus.bdev) {
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bdev = sc->sc_ohci.sc_bus.bdev;
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device_detach(bdev);
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device_delete_child(dev, bdev);
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}
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/* during module unload there are lots of children leftover */
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device_delete_children(dev);
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/*
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* Put the controller into reset, then disable clocks and do
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* the MI tear down. We have to disable the clocks/hardware
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* after we do the rest of the teardown. We also disable the
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* clocks in the opposite order we acquire them, but that
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* doesn't seem to be absolutely necessary. We free up the
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* clocks after we disable them, so the system could, in
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* theory, reuse them.
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*/
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bus_space_write_4(sc->sc_ohci.sc_io_tag, sc->sc_ohci.sc_io_hdl,
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OHCI_CONTROL, 0);
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if (sc->sc_ohci.sc_intr_hdl) {
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bus_teardown_intr(dev, sc->sc_ohci.sc_irq_res, sc->sc_ohci.sc_intr_hdl);
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sc->sc_ohci.sc_intr_hdl = NULL;
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}
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if (sc->sc_ohci.sc_irq_res && sc->sc_ohci.sc_intr_hdl) {
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/*
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* only call ohci_detach() after ohci_init()
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*/
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ohci_detach(&sc->sc_ohci);
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bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_ohci.sc_irq_res);
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sc->sc_ohci.sc_irq_res = NULL;
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}
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if (sc->sc_ohci.sc_io_res) {
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bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_ohci.sc_io_res);
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sc->sc_ohci.sc_io_res = NULL;
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sc->sc_ohci.sc_io_tag = 0;
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sc->sc_ohci.sc_io_hdl = 0;
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}
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usb_bus_mem_free_all(&sc->sc_ohci.sc_bus, &ohci_iterate_hw_softc);
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return (0);
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}
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static device_method_t ohci_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, ar71xx_ohci_probe),
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DEVMETHOD(device_attach, ar71xx_ohci_attach),
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DEVMETHOD(device_detach, ar71xx_ohci_detach),
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DEVMETHOD(device_suspend, bus_generic_suspend),
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DEVMETHOD(device_resume, bus_generic_resume),
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DEVMETHOD(device_shutdown, bus_generic_shutdown),
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DEVMETHOD_END
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};
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static driver_t ohci_driver = {
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.name = "ohci",
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.methods = ohci_methods,
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.size = sizeof(struct ar71xx_ohci_softc),
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};
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static devclass_t ohci_devclass;
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DRIVER_MODULE(ohci, apb, ohci_driver, ohci_devclass, 0, 0);
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