8bf1194fe5
Freescale's QorIQ line includes a new ethernet controller, based on their Datapath Acceleration Architecture (DPAA). This uses a combination of a Frame manager, Buffer manager, and Queue manager to improve performance across all interfaces by being able to pass data directly between hardware acceleration interfaces. As part of this import, Freescale's Netcomm Software (ncsw) driver is imported. This was an attempt by Freescale to create an OS-agnostic sub-driver for managing the hardware, using shims to interface to the OS-specific APIs. This work was abandoned, and Freescale's primary work is in the Linux driver (dual BSD/GPL license). Hence, this was imported directly to sys/contrib, rather than going through the vendor area. Going forward, FreeBSD-specific changes may be made to the ncsw code, diverging from the upstream in potentially incompatible ways. An alternative could be to import the Linux driver itself, using the linuxKPI layer, as that would maintain parity with the vendor-maintained driver. However, the Linux driver has not been evaluated for reliability yet, and may have issues with the import, whereas the ncsw-based driver in this commit was completed by Semihalf 4 years ago, and is very stable. Other SoC modules based on DPAA, which could be added in the future: * Security and Encryption engine (SEC4.x, SEC5.x) * RAID engine Additional work to be done: * Implement polling mode * Test vlan support * Add support for the Pattern Matching Engine, which can do regular expression matching on packets. This driver has been tested on the P5020 QorIQ SoC. Others listed in the dtsec(4) manual page are expected to work as the same DPAA engine is included in all. Obtained from: Semihalf Relnotes: Yes Sponsored by: Alex Perez/Inertial Computing
167 lines
5.1 KiB
C
167 lines
5.1 KiB
C
/*-
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* Copyright (c) 2012 Semihalf.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include "opt_platform.h"
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/bus.h>
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#include <sys/proc.h>
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#include <sys/pcpu.h>
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#include <sys/rman.h>
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#include <sys/sched.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <machine/resource.h>
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#include <machine/tlb.h>
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#include <contrib/ncsw/inc/error_ext.h>
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#include <contrib/ncsw/inc/xx_ext.h>
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#include "portals.h"
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int
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dpaa_portal_alloc_res(device_t dev, struct dpaa_portals_devinfo *di, int cpu)
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{
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struct dpaa_portals_softc *sc = device_get_softc(dev);
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struct resource_list_entry *rle;
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int err;
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struct resource_list *res;
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/* Check if MallocSmart allocator is ready */
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if (XX_MallocSmartInit() != E_OK)
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return (ENXIO);
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res = &di->di_res;
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/*
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* Allocate memory.
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* Reserve only one pair of CE/CI virtual memory regions
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* for all CPUs, in order to save the space.
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*/
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if (sc->sc_rres[0] == NULL) {
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/* Cache enabled area */
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rle = resource_list_find(res, SYS_RES_MEMORY, 0);
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sc->sc_rrid[0] = 0;
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sc->sc_rres[0] = bus_alloc_resource(dev,
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SYS_RES_MEMORY, &sc->sc_rrid[0], rle->start + sc->sc_dp_pa,
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rle->end + sc->sc_dp_pa, rle->count, RF_ACTIVE);
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pmap_change_attr((vm_offset_t)rman_get_bushandle(sc->sc_rres[0]),
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rle->count, VM_MEMATTR_CACHEABLE);
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if (sc->sc_rres[0] == NULL) {
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device_printf(dev, "Could not allocate memory.\n");
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return (ENXIO);
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}
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/* Cache inhibited area */
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rle = resource_list_find(res, SYS_RES_MEMORY, 1);
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sc->sc_rrid[1] = 1;
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sc->sc_rres[1] = bus_alloc_resource(dev,
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SYS_RES_MEMORY, &sc->sc_rrid[1], rle->start + sc->sc_dp_pa,
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rle->end + sc->sc_dp_pa, rle->count, RF_ACTIVE);
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if (sc->sc_rres[1] == NULL) {
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device_printf(dev, "Could not allocate memory.\n");
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bus_release_resource(dev, SYS_RES_MEMORY,
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sc->sc_rrid[0], sc->sc_rres[0]);
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return (ENXIO);
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}
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sc->sc_dp[PCPU_GET(cpuid)].dp_regs_mapped = 1;
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}
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/* Acquire portal's CE_PA and CI_PA */
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rle = resource_list_find(res, SYS_RES_MEMORY, 0);
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sc->sc_dp[cpu].dp_ce_pa = rle->start + sc->sc_dp_pa;
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sc->sc_dp[cpu].dp_ce_size = rle->count;
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rle = resource_list_find(res, SYS_RES_MEMORY, 1);
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sc->sc_dp[cpu].dp_ci_pa = rle->start + sc->sc_dp_pa;
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sc->sc_dp[cpu].dp_ci_size = rle->count;
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/* Allocate interrupts */
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rle = resource_list_find(res, SYS_RES_IRQ, 0);
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sc->sc_dp[cpu].dp_irid = 0;
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sc->sc_dp[cpu].dp_ires = bus_alloc_resource(dev,
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SYS_RES_IRQ, &sc->sc_dp[cpu].dp_irid, rle->start, rle->end,
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rle->count, RF_ACTIVE);
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/* Save interrupt number for later use */
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sc->sc_dp[cpu].dp_intr_num = rle->start;
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if (sc->sc_dp[cpu].dp_ires == NULL) {
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device_printf(dev, "Could not allocate irq.\n");
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return (ENXIO);
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}
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err = XX_PreallocAndBindIntr((int)sc->sc_dp[cpu].dp_ires, cpu);
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if (err != E_OK) {
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device_printf(dev, "Could not prealloc and bind interrupt\n");
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bus_release_resource(dev, SYS_RES_IRQ,
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sc->sc_dp[cpu].dp_irid, sc->sc_dp[cpu].dp_ires);
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sc->sc_dp[cpu].dp_ires = NULL;
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return (ENXIO);
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}
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#if 0
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err = bus_generic_config_intr(dev, rle->start, di->di_intr_trig,
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di->di_intr_pol);
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if (err != 0) {
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device_printf(dev, "Could not configure interrupt\n");
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bus_release_resource(dev, SYS_RES_IRQ,
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sc->sc_dp[cpu].dp_irid, sc->sc_dp[cpu].dp_ires);
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sc->sc_dp[cpu].dp_ires = NULL;
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return (err);
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}
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#endif
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return (0);
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}
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void
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dpaa_portal_map_registers(struct dpaa_portals_softc *sc)
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{
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unsigned int cpu;
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sched_pin();
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cpu = PCPU_GET(cpuid);
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if (sc->sc_dp[cpu].dp_regs_mapped)
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goto out;
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tlb1_set_entry(rman_get_bushandle(sc->sc_rres[0]),
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sc->sc_dp[cpu].dp_ce_pa, sc->sc_dp[cpu].dp_ce_size,
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_TLB_ENTRY_MEM);
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tlb1_set_entry(rman_get_bushandle(sc->sc_rres[1]),
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sc->sc_dp[cpu].dp_ci_pa, sc->sc_dp[cpu].dp_ci_size,
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_TLB_ENTRY_IO);
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sc->sc_dp[cpu].dp_regs_mapped = 1;
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out:
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sched_unpin();
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}
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