740be6d755
This update brings initial support for Haswell GPUs. Tested by: Many users of FreeBSD, PC-BSD and HardenedBSD Relnotes: yes Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D5554
283 lines
6.7 KiB
C
283 lines
6.7 KiB
C
/**************************************************************************
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Copyright © 2006 Dave Airlie
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All Rights Reserved.
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the
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"Software"), to deal in the Software without restriction, including
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without limitation the rights to use, copy, modify, merge, publish,
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distribute, sub license, and/or sell copies of the Software, and to
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permit persons to whom the Software is furnished to do so, subject to
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the following conditions:
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The above copyright notice and this permission notice (including the
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next paragraph) shall be included in all copies or substantial portions
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of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
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IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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**************************************************************************/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "dvo.h"
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#define SIL164_VID 0x0001
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#define SIL164_DID 0x0006
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#define SIL164_VID_LO 0x00
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#define SIL164_VID_HI 0x01
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#define SIL164_DID_LO 0x02
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#define SIL164_DID_HI 0x03
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#define SIL164_REV 0x04
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#define SIL164_RSVD 0x05
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#define SIL164_FREQ_LO 0x06
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#define SIL164_FREQ_HI 0x07
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#define SIL164_REG8 0x08
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#define SIL164_8_VEN (1<<5)
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#define SIL164_8_HEN (1<<4)
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#define SIL164_8_DSEL (1<<3)
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#define SIL164_8_BSEL (1<<2)
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#define SIL164_8_EDGE (1<<1)
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#define SIL164_8_PD (1<<0)
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#define SIL164_REG9 0x09
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#define SIL164_9_VLOW (1<<7)
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#define SIL164_9_MSEL_MASK (0x7<<4)
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#define SIL164_9_TSEL (1<<3)
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#define SIL164_9_RSEN (1<<2)
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#define SIL164_9_HTPLG (1<<1)
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#define SIL164_9_MDI (1<<0)
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#define SIL164_REGC 0x0c
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struct sil164_priv {
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//I2CDevRec d;
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bool quiet;
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};
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#define SILPTR(d) ((SIL164Ptr)(d->DriverPrivate.ptr))
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static bool sil164_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch)
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{
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struct sil164_priv *sil = dvo->dev_priv;
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device_t adapter = dvo->i2c_bus;
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u8 out_buf[2];
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u8 in_buf[2];
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struct iic_msg msgs[] = {
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{
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.slave = dvo->slave_addr << 1,
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.flags = 0,
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.len = 1,
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.buf = out_buf,
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},
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{
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.slave = dvo->slave_addr << 1,
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.flags = I2C_M_RD,
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.len = 1,
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.buf = in_buf,
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}
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};
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out_buf[0] = addr;
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out_buf[1] = 0;
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if (-iicbus_transfer(adapter, msgs, 2) == 0) {
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*ch = in_buf[0];
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return true;
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}
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if (!sil->quiet) {
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DRM_DEBUG_KMS("Unable to read register 0x%02x from %s:%02x.\n",
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addr, device_get_nameunit(adapter), dvo->slave_addr);
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}
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return false;
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}
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static bool sil164_writeb(struct intel_dvo_device *dvo, int addr, uint8_t ch)
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{
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struct sil164_priv *sil = dvo->dev_priv;
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device_t adapter = dvo->i2c_bus;
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uint8_t out_buf[2];
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struct iic_msg msg = {
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.slave = dvo->slave_addr << 1,
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.flags = 0,
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.len = 2,
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.buf = out_buf,
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};
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out_buf[0] = addr;
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out_buf[1] = ch;
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if (-iicbus_transfer(adapter, &msg, 1) == 0)
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return true;
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if (!sil->quiet) {
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DRM_DEBUG_KMS("Unable to write register 0x%02x to %s:%d.\n",
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addr, device_get_nameunit(adapter), dvo->slave_addr);
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}
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return false;
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}
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/* Silicon Image 164 driver for chip on i2c bus */
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static bool sil164_init(struct intel_dvo_device *dvo,
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device_t adapter)
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{
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/* this will detect the SIL164 chip on the specified i2c bus */
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struct sil164_priv *sil;
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unsigned char ch;
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sil = malloc(sizeof(struct sil164_priv), DRM_MEM_KMS, M_NOWAIT | M_ZERO);
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if (sil == NULL)
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return false;
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dvo->i2c_bus = adapter;
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dvo->dev_priv = sil;
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sil->quiet = true;
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if (!sil164_readb(dvo, SIL164_VID_LO, &ch))
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goto out;
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if (ch != (SIL164_VID & 0xff)) {
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DRM_DEBUG_KMS("sil164 not detected got %d: from %s Slave %d.\n",
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ch, device_get_nameunit(adapter), dvo->slave_addr);
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goto out;
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}
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if (!sil164_readb(dvo, SIL164_DID_LO, &ch))
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goto out;
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if (ch != (SIL164_DID & 0xff)) {
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DRM_DEBUG_KMS("sil164 not detected got %d: from %s Slave %d.\n",
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ch, device_get_nameunit(adapter), dvo->slave_addr);
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goto out;
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}
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sil->quiet = false;
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DRM_DEBUG_KMS("init sil164 dvo controller successfully!\n");
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return true;
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out:
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free(sil, DRM_MEM_KMS);
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return false;
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}
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static enum drm_connector_status sil164_detect(struct intel_dvo_device *dvo)
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{
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uint8_t reg9;
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sil164_readb(dvo, SIL164_REG9, ®9);
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if (reg9 & SIL164_9_HTPLG)
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return connector_status_connected;
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else
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return connector_status_disconnected;
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}
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static enum drm_mode_status sil164_mode_valid(struct intel_dvo_device *dvo,
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struct drm_display_mode *mode)
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{
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return MODE_OK;
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}
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static void sil164_mode_set(struct intel_dvo_device *dvo,
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struct drm_display_mode *mode,
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struct drm_display_mode *adjusted_mode)
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{
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/* As long as the basics are set up, since we don't have clock
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* dependencies in the mode setup, we can just leave the
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* registers alone and everything will work fine.
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*/
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/* recommended programming sequence from doc */
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/*sil164_writeb(sil, 0x08, 0x30);
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sil164_writeb(sil, 0x09, 0x00);
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sil164_writeb(sil, 0x0a, 0x90);
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sil164_writeb(sil, 0x0c, 0x89);
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sil164_writeb(sil, 0x08, 0x31);*/
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/* don't do much */
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return;
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}
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/* set the SIL164 power state */
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static void sil164_dpms(struct intel_dvo_device *dvo, bool enable)
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{
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int ret;
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unsigned char ch;
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ret = sil164_readb(dvo, SIL164_REG8, &ch);
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if (ret == false)
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return;
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if (enable)
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ch |= SIL164_8_PD;
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else
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ch &= ~SIL164_8_PD;
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sil164_writeb(dvo, SIL164_REG8, ch);
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return;
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}
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static bool sil164_get_hw_state(struct intel_dvo_device *dvo)
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{
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int ret;
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unsigned char ch;
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ret = sil164_readb(dvo, SIL164_REG8, &ch);
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if (ret == false)
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return false;
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if (ch & SIL164_8_PD)
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return true;
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else
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return false;
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}
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static void sil164_dump_regs(struct intel_dvo_device *dvo)
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{
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uint8_t val;
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sil164_readb(dvo, SIL164_FREQ_LO, &val);
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DRM_LOG_KMS("SIL164_FREQ_LO: 0x%02x\n", val);
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sil164_readb(dvo, SIL164_FREQ_HI, &val);
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DRM_LOG_KMS("SIL164_FREQ_HI: 0x%02x\n", val);
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sil164_readb(dvo, SIL164_REG8, &val);
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DRM_LOG_KMS("SIL164_REG8: 0x%02x\n", val);
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sil164_readb(dvo, SIL164_REG9, &val);
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DRM_LOG_KMS("SIL164_REG9: 0x%02x\n", val);
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sil164_readb(dvo, SIL164_REGC, &val);
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DRM_LOG_KMS("SIL164_REGC: 0x%02x\n", val);
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}
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static void sil164_destroy(struct intel_dvo_device *dvo)
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{
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struct sil164_priv *sil = dvo->dev_priv;
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if (sil) {
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free(sil, DRM_MEM_KMS);
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dvo->dev_priv = NULL;
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}
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}
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struct intel_dvo_dev_ops sil164_ops = {
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.init = sil164_init,
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.detect = sil164_detect,
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.mode_valid = sil164_mode_valid,
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.mode_set = sil164_mode_set,
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.dpms = sil164_dpms,
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.get_hw_state = sil164_get_hw_state,
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.dump_regs = sil164_dump_regs,
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.destroy = sil164_destroy,
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};
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