c63d83f7c2
abuses busdma in other ways, and those will likely be fixed another day.
1033 lines
27 KiB
C
1033 lines
27 KiB
C
/*-
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* Copyright (c) 2003-04 3ware, Inc.
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* Copyright (c) 2000 Michael Smith
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* Copyright (c) 2000 BSDi
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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/*
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* 3ware driver for 9000 series storage controllers.
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*
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* Author: Vinod Kashyap
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*/
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#include <dev/twa/twa_includes.h>
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static void twa_setup_data_dmamap(void *arg, bus_dma_segment_t *segs,
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int nsegments, int error);
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static void twa_setup_request_dmamap(void *arg, bus_dma_segment_t *segs,
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int nsegments, int error);
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MALLOC_DEFINE(TWA_MALLOC_CLASS, "twa commands", "twa commands");
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static d_open_t twa_open;
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static d_close_t twa_close;
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static d_ioctl_t twa_ioctl_wrapper;
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static struct cdevsw twa_cdevsw = {
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.d_version = D_VERSION,
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.d_flags = D_NEEDGIANT,
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.d_open = twa_open,
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.d_close = twa_close,
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.d_ioctl = twa_ioctl_wrapper,
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.d_name = "twa",
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};
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static devclass_t twa_devclass;
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/*
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* Function name: twa_open
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* Description: Called when the controller is opened.
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* Simply marks the controller as open.
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*
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* Input: dev -- control device corresponding to the ctlr
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* flags -- mode of open
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* fmt -- device type (character/block etc.)
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* proc -- current process
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* Output: None
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* Return value: 0 -- success
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* non-zero-- failure
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*/
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static int
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twa_open(struct cdev *dev, int flags, int fmt, d_thread_t *proc)
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{
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int unit = minor(dev);
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struct twa_softc *sc = devclass_get_softc(twa_devclass, unit);
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sc->twa_state |= TWA_STATE_OPEN;
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return(0);
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}
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/*
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* Function name: twa_close
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* Description: Called when the controller is closed.
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* Simply marks the controller as not open.
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*
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* Input: dev -- control device corresponding to the ctlr
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* flags -- mode of corresponding open
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* fmt -- device type (character/block etc.)
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* proc -- current process
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* Output: None
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* Return value: 0 -- success
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* non-zero-- failure
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*/
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static int
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twa_close(struct cdev *dev, int flags, int fmt, d_thread_t *proc)
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{
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int unit = minor(dev);
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struct twa_softc *sc = devclass_get_softc(twa_devclass, unit);
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sc->twa_state &= ~TWA_STATE_OPEN;
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return(0);
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}
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/*
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* Function name: twa_ioctl_wrapper
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* Description: Called when an ioctl is posted to the controller.
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* Simply calls the ioctl handler.
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*
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* Input: dev -- control device corresponding to the ctlr
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* cmd -- ioctl cmd
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* buf -- ptr to buffer in kernel memory, which is
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* a copy of the input buffer in user-space
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* flags -- mode of corresponding open
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* proc -- current process
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* Output: buf -- ptr to buffer in kernel memory, which will
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* be copied to the output buffer in user-space
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* Return value: 0 -- success
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* non-zero-- failure
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*/
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static int
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twa_ioctl_wrapper(struct cdev *dev, u_long cmd, caddr_t buf,
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int flags, d_thread_t *proc)
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{
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struct twa_softc *sc = (struct twa_softc *)(dev->si_drv1);
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return(twa_ioctl(sc, cmd, buf));
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}
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static int twa_probe (device_t dev);
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static int twa_attach (device_t dev);
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static void twa_free (struct twa_softc *sc);
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static int twa_detach (device_t dev);
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static int twa_shutdown (device_t dev);
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static int twa_suspend (device_t dev);
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static int twa_resume (device_t dev);
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static void twa_pci_intr(void *arg);
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static void twa_intrhook (void *arg);
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static device_method_t twa_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, twa_probe),
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DEVMETHOD(device_attach, twa_attach),
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DEVMETHOD(device_detach, twa_detach),
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DEVMETHOD(device_shutdown, twa_shutdown),
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DEVMETHOD(device_suspend, twa_suspend),
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DEVMETHOD(device_resume, twa_resume),
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DEVMETHOD(bus_print_child, bus_generic_print_child),
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DEVMETHOD(bus_driver_added, bus_generic_driver_added),
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{0, 0}
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};
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static driver_t twa_pci_driver = {
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"twa",
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twa_methods,
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sizeof(struct twa_softc)
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};
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DRIVER_MODULE(twa, pci, twa_pci_driver, twa_devclass, 0, 0);
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/*
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* Function name: twa_probe
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* Description: Called at driver load time. Claims 9000 ctlrs.
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*
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* Input: dev -- bus device corresponding to the ctlr
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* Output: None
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* Return value: <= 0 -- success
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* > 0 -- failure
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*/
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static int
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twa_probe(device_t dev)
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{
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static u_int8_t first_ctlr = 1;
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twa_dbg_print(3, "entered");
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if ((pci_get_vendor(dev) == TWA_VENDOR_ID) &&
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(pci_get_device(dev) == TWA_DEVICE_ID_9K)) {
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device_set_desc(dev, TWA_DEVICE_NAME);
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/* Print the driver version only once. */
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if (first_ctlr) {
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printf("3ware device driver for 9000 series storage controllers, version: %s\n",
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TWA_DRIVER_VERSION_STRING);
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first_ctlr = 0;
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}
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return(0);
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}
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return(ENXIO);
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}
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/*
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* Function name: twa_attach
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* Description: Allocates pci resources; updates sc; adds a node to the
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* sysctl tree to expose the driver version; makes calls
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* to initialize ctlr, and to attach to CAM.
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*
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* Input: dev -- bus device corresponding to the ctlr
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* Output: None
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* Return value: 0 -- success
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* non-zero-- failure
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*/
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static int
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twa_attach(device_t dev)
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{
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struct twa_softc *sc = device_get_softc(dev);
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u_int32_t command;
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int res_id;
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int error;
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twa_dbg_dprint_enter(3, sc);
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/* Initialize the softc structure. */
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sc->twa_bus_dev = dev;
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sysctl_ctx_init(&sc->twa_sysctl_ctx);
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sc->twa_sysctl_tree = SYSCTL_ADD_NODE(&sc->twa_sysctl_ctx,
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SYSCTL_STATIC_CHILDREN(_hw), OID_AUTO,
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device_get_nameunit(dev), CTLFLAG_RD, 0, "");
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if (sc->twa_sysctl_tree == NULL) {
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twa_printf(sc, "Cannot add sysctl tree node.\n");
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return(ENXIO);
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}
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SYSCTL_ADD_STRING(&sc->twa_sysctl_ctx, SYSCTL_CHILDREN(sc->twa_sysctl_tree),
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OID_AUTO, "driver_version", CTLFLAG_RD,
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TWA_DRIVER_VERSION_STRING, 0, "TWA driver version");
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/* Make sure we are going to be able to talk to this board. */
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command = pci_read_config(dev, PCIR_COMMAND, 2);
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if ((command & PCIM_CMD_PORTEN) == 0) {
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twa_printf(sc, "Register window not available.\n");
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return(ENXIO);
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}
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/* Force the busmaster enable bit on, in case the BIOS forgot. */
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command |= PCIM_CMD_BUSMASTEREN;
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pci_write_config(dev, PCIR_COMMAND, command, 2);
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/* Allocate the PCI register window. */
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res_id = TWA_IO_CONFIG_REG;
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if ((sc->twa_io_res = bus_alloc_resource(dev, SYS_RES_IOPORT, &res_id,
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0, ~0, 1, RF_ACTIVE)) == NULL) {
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twa_printf(sc, "can't allocate register window.\n");
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twa_free(sc);
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return(ENXIO);
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}
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sc->twa_bus_tag = rman_get_bustag(sc->twa_io_res);
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sc->twa_bus_handle = rman_get_bushandle(sc->twa_io_res);
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/* Allocate and connect our interrupt. */
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res_id = 0;
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if ((sc->twa_irq_res = bus_alloc_resource(sc->twa_bus_dev, SYS_RES_IRQ,
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&res_id, 0, ~0, 1,
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RF_SHAREABLE | RF_ACTIVE)) == NULL) {
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twa_printf(sc, "Can't allocate interrupt.\n");
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twa_free(sc);
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return(ENXIO);
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}
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if (bus_setup_intr(sc->twa_bus_dev, sc->twa_irq_res, INTR_TYPE_CAM,
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twa_pci_intr, sc, &sc->twa_intr_handle)) {
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twa_printf(sc, "Can't set up interrupt.\n");
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twa_free(sc);
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return(ENXIO);
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}
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/* Initialize the driver for this controller. */
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if ((error = twa_setup(sc))) {
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twa_free(sc);
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return(error);
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}
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/* Print some information about the controller and configuration. */
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twa_describe_controller(sc);
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/* Create the control device. */
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sc->twa_ctrl_dev = make_dev(&twa_cdevsw, device_get_unit(sc->twa_bus_dev),
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UID_ROOT, GID_OPERATOR, S_IRUSR | S_IWUSR,
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"twa%d", device_get_unit(sc->twa_bus_dev));
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sc->twa_ctrl_dev->si_drv1 = sc;
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/*
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* Schedule ourselves to bring the controller up once interrupts are
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* available. This isn't strictly necessary, since we disable
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* interrupts while probing the controller, but it is more in keeping
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* with common practice for other disk devices.
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*/
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sc->twa_ich.ich_func = twa_intrhook;
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sc->twa_ich.ich_arg = sc;
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if (config_intrhook_establish(&sc->twa_ich) != 0) {
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twa_printf(sc, "Can't establish configuration hook.\n");
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twa_free(sc);
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return(ENXIO);
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}
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if ((error = twa_cam_setup(sc))) {
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twa_free(sc);
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return(error);
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}
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return(0);
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}
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/*
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* Function name: twa_free
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* Description: Performs clean-up at the time of going down.
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*
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* Input: sc -- ptr to per ctlr structure
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* Output: None
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* Return value: None
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*/
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static void
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twa_free(struct twa_softc *sc)
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{
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struct twa_request *tr;
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twa_dbg_dprint_enter(3, sc);
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/* Detach from CAM */
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twa_cam_detach(sc);
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/* Destroy dma handles. */
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bus_dmamap_unload(sc->twa_dma_tag, sc->twa_cmd_map);
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while ((tr = twa_dequeue_free(sc)) != NULL)
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bus_dmamap_destroy(sc->twa_dma_tag, tr->tr_dma_map);
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/* Free all memory allocated so far. */
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if (sc->twa_req_buf)
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free(sc->twa_req_buf, TWA_MALLOC_CLASS);
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if (sc->twa_cmd_pkt_buf)
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bus_dmamem_free(sc->twa_dma_tag, sc->twa_cmd_pkt_buf,
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sc->twa_cmd_map);
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if (sc->twa_aen_queue[0])
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free (sc->twa_aen_queue[0], M_DEVBUF);
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/* Destroy the data-transfer DMA tag. */
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if (sc->twa_dma_tag)
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bus_dma_tag_destroy(sc->twa_dma_tag);
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/* Disconnect the interrupt handler. */
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if (sc->twa_intr_handle)
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bus_teardown_intr(sc->twa_bus_dev, sc->twa_irq_res,
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sc->twa_intr_handle);
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if (sc->twa_irq_res != NULL)
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bus_release_resource(sc->twa_bus_dev, SYS_RES_IRQ,
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0, sc->twa_irq_res);
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/* Release the register window mapping. */
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if (sc->twa_io_res != NULL)
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bus_release_resource(sc->twa_bus_dev, SYS_RES_IOPORT,
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TWA_IO_CONFIG_REG, sc->twa_io_res);
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/* Destroy the control device. */
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if (sc->twa_ctrl_dev != (struct cdev *)NULL)
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destroy_dev(sc->twa_ctrl_dev);
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sysctl_ctx_free(&sc->twa_sysctl_ctx);
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}
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/*
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* Function name: twa_detach
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* Description: Called when the controller is being detached from
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* the pci bus.
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*
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* Input: dev -- bus device corresponding to the ctlr
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* Output: None
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* Return value: 0 -- success
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* non-zero-- failure
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*/
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static int
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twa_detach(device_t dev)
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{
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struct twa_softc *sc = device_get_softc(dev);
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int s;
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int error;
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twa_dbg_dprint_enter(3, sc);
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error = EBUSY;
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s = splcam();
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if (sc->twa_state & TWA_STATE_OPEN)
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goto out;
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/* Shut the controller down. */
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if ((error = twa_shutdown(dev)))
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goto out;
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/* Free all resources associated with this controller. */
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twa_free(sc);
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error = 0;
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out:
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splx(s);
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return(error);
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}
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/*
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* Function name: twa_shutdown
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* Description: Called at unload/shutdown time. Lets the controller
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* know that we are going down.
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*
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* Input: dev -- bus device corresponding to the ctlr
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* Output: None
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* Return value: 0 -- success
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* non-zero-- failure
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*/
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static int
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twa_shutdown(device_t dev)
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{
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struct twa_softc *sc = device_get_softc(dev);
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int s;
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int error = 0;
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twa_dbg_dprint_enter(3, sc);
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s = splcam();
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/* Disconnect from the controller. */
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error = twa_deinit_ctlr(sc);
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splx(s);
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return(error);
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}
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|
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/*
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* Function name: twa_suspend
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* Description: Called to suspend I/O before hot-swapping PCI ctlrs.
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* Doesn't do much as of now.
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*
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* Input: dev -- bus device corresponding to the ctlr
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* Output: None
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* Return value: 0 -- success
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* non-zero-- failure
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*/
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static int
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twa_suspend(device_t dev)
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{
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struct twa_softc *sc = device_get_softc(dev);
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int s;
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twa_dbg_dprint_enter(3, sc);
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s = splcam();
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sc->twa_state |= TWA_STATE_SUSPEND;
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twa_disable_interrupts(sc);
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splx(s);
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return(1);
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}
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|
|
|
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|
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/*
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* Function name: twa_resume
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* Description: Called to resume I/O after hot-swapping PCI ctlrs.
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|
* Doesn't do much as of now.
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*
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* Input: dev -- bus device corresponding to the ctlr
|
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* Output: None
|
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* Return value: 0 -- success
|
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* non-zero-- failure
|
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*/
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static int
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twa_resume(device_t dev)
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{
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struct twa_softc *sc = device_get_softc(dev);
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twa_dbg_dprint_enter(3, sc);
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sc->twa_state &= ~TWA_STATE_SUSPEND;
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twa_enable_interrupts(sc);
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|
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return(1);
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}
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|
|
|
|
|
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/*
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* Function name: twa_pci_intr
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* Description: Interrupt handler. Wrapper for twa_interrupt.
|
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*
|
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* Input: arg -- ptr to per ctlr structure
|
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* Output: None
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* Return value: None
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*/
|
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static void
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twa_pci_intr(void *arg)
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{
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struct twa_softc *sc = (struct twa_softc *)arg;
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|
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twa_interrupt(sc);
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}
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|
|
|
|
|
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/*
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* Function name: twa_intrhook
|
|
* Description: Callback for us to enable interrupts.
|
|
*
|
|
* Input: arg -- ptr to per ctlr structure
|
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* Output: None
|
|
* Return value: None
|
|
*/
|
|
static void
|
|
twa_intrhook(void *arg)
|
|
{
|
|
struct twa_softc *sc = (struct twa_softc *)arg;
|
|
|
|
twa_dbg_dprint(4, sc, "twa_intrhook Entered");
|
|
|
|
/* Pull ourselves off the intrhook chain. */
|
|
config_intrhook_disestablish(&sc->twa_ich);
|
|
|
|
/* Enable interrupts. */
|
|
twa_enable_interrupts(sc);
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
* Function name: twa_write_pci_config
|
|
* Description: Writes to the PCI config space.
|
|
*
|
|
* Input: sc -- ptr to per ctlr structure
|
|
* value -- value to be written
|
|
* size -- # of bytes to be written
|
|
* Output: None
|
|
* Return value: None
|
|
*/
|
|
void
|
|
twa_write_pci_config(struct twa_softc *sc, u_int32_t value, int size)
|
|
{
|
|
pci_write_config(sc->twa_bus_dev, PCIR_STATUS, value, size);
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
* Function name: twa_alloc_req_pkts
|
|
* Description: Allocates memory for, and initializes request pkts,
|
|
* and queues them in the free queue.
|
|
*
|
|
* Input: sc -- ptr to per ctlr structure
|
|
* num_reqs-- # of request pkts to allocate and initialize.
|
|
* Output: None
|
|
* Return value: 0 -- success
|
|
* non-zero-- failure
|
|
*/
|
|
int
|
|
twa_alloc_req_pkts(struct twa_softc *sc, int num_reqs)
|
|
{
|
|
struct twa_request *tr;
|
|
int i;
|
|
|
|
if ((sc->twa_req_buf = malloc(num_reqs * sizeof(struct twa_request),
|
|
TWA_MALLOC_CLASS, M_NOWAIT)) == NULL)
|
|
return(ENOMEM);
|
|
|
|
/* Allocate the bus DMA tag appropriate for PCI. */
|
|
if (bus_dma_tag_create(NULL, /* parent */
|
|
TWA_ALIGNMENT, /* alignment */
|
|
0, /* boundary */
|
|
BUS_SPACE_MAXADDR, /* lowaddr */
|
|
BUS_SPACE_MAXADDR, /* highaddr */
|
|
NULL, NULL, /* filter, filterarg */
|
|
TWA_Q_LENGTH *
|
|
(sizeof(struct twa_command_packet)),/* maxsize */
|
|
TWA_MAX_SG_ELEMENTS, /* nsegments */
|
|
BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */
|
|
BUS_DMA_ALLOCNOW, /* flags */
|
|
busdma_lock_mutex, /* lockfunc */
|
|
&Giant, /* lockfuncarg */
|
|
&sc->twa_dma_tag /* tag */)) {
|
|
twa_printf(sc, "Can't allocate DMA tag.\n");
|
|
return(ENOMEM);
|
|
}
|
|
|
|
/* Allocate memory for cmd pkts. */
|
|
if (bus_dmamem_alloc(sc->twa_dma_tag,
|
|
(void *)(&(sc->twa_cmd_pkt_buf)),
|
|
BUS_DMA_WAITOK, &(sc->twa_cmd_map)))
|
|
return(ENOMEM);
|
|
|
|
bus_dmamap_load(sc->twa_dma_tag, sc->twa_cmd_map,
|
|
sc->twa_cmd_pkt_buf,
|
|
num_reqs * sizeof(struct twa_command_packet),
|
|
twa_setup_request_dmamap, sc, 0);
|
|
bzero(sc->twa_req_buf, num_reqs * sizeof(struct twa_request));
|
|
bzero(sc->twa_cmd_pkt_buf,
|
|
num_reqs * sizeof(struct twa_command_packet));
|
|
|
|
for (i = 0; i < num_reqs; i++) {
|
|
tr = &(sc->twa_req_buf[i]);
|
|
tr->tr_command = &(sc->twa_cmd_pkt_buf[i]);
|
|
tr->tr_cmd_phys = sc->twa_cmd_pkt_phys +
|
|
(i * sizeof(struct twa_command_packet));
|
|
tr->tr_request_id = i;
|
|
tr->tr_sc = sc;
|
|
sc->twa_lookup[i] = tr;
|
|
|
|
/*
|
|
* Create a map for data buffers. maxsize (256 * 1024) used in
|
|
* bus_dma_tag_create above should suffice the bounce page needs
|
|
* for data buffers, since the max I/O size we support is 128KB.
|
|
* If we supported I/O's bigger than 256KB, we would have to
|
|
* create a second dma_tag, with the appropriate maxsize.
|
|
*/
|
|
if (bus_dmamap_create(sc->twa_dma_tag, 0,
|
|
&tr->tr_dma_map))
|
|
return(ENOMEM);
|
|
|
|
/* Insert request into the free queue. */
|
|
twa_release_request(tr);
|
|
}
|
|
return(0);
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
* Function name: twa_fillin_sgl
|
|
* Description: Fills in the scatter/gather list.
|
|
*
|
|
* Input: sgl -- ptr to sg list
|
|
* segs -- ptr to fill the sg list from
|
|
* nsegments--# of segments
|
|
* Output: None
|
|
* Return value: None
|
|
*/
|
|
static void
|
|
twa_fillin_sgl(struct twa_sg *sgl, bus_dma_segment_t *segs, int nsegments)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < nsegments; i++) {
|
|
sgl[i].address = segs[i].ds_addr;
|
|
sgl[i].length = segs[i].ds_len;
|
|
}
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
* Function name: twa_setup_data_dmamap
|
|
* Description: Callback of bus_dmamap_load for the buffer associated
|
|
* with data. Updates the cmd pkt (size/sgl_entries
|
|
* fields, as applicable) to reflect the number of sg
|
|
* elements.
|
|
*
|
|
* Input: arg -- ptr to request pkt
|
|
* segs -- ptr to a list of segment descriptors
|
|
* nsegments--# of segments
|
|
* error -- 0 if no errors encountered before callback,
|
|
* non-zero if errors were encountered
|
|
* Output: None
|
|
* Return value: None
|
|
*/
|
|
static void
|
|
twa_setup_data_dmamap(void *arg, bus_dma_segment_t *segs,
|
|
int nsegments, int error)
|
|
{
|
|
struct twa_request *tr = (struct twa_request *)arg;
|
|
struct twa_command_packet *cmdpkt = tr->tr_command;
|
|
struct twa_command_9k *cmd9k;
|
|
union twa_command_7k *cmd7k;
|
|
u_int8_t sgl_offset;
|
|
|
|
twa_dbg_dprint_enter(10, tr->tr_sc);
|
|
|
|
if ((tr->tr_flags & TWA_CMD_IN_PROGRESS) &&
|
|
(tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_EXTERNAL))
|
|
twa_allow_new_requests(tr->tr_sc, (void *)(tr->tr_private));
|
|
|
|
if (error == EFBIG) {
|
|
tr->tr_error = error;
|
|
goto out;
|
|
}
|
|
|
|
if (tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_9K) {
|
|
cmd9k = &(cmdpkt->command.cmd_pkt_9k);
|
|
twa_fillin_sgl(&(cmd9k->sg_list[0]), segs, nsegments);
|
|
cmd9k->sgl_entries += nsegments - 1;
|
|
} else {
|
|
/* It's a 7000 command packet. */
|
|
cmd7k = &(cmdpkt->command.cmd_pkt_7k);
|
|
if ((sgl_offset = cmdpkt->command.cmd_pkt_7k.generic.sgl_offset))
|
|
twa_fillin_sgl((struct twa_sg *)
|
|
(((u_int32_t *)cmd7k) + sgl_offset),
|
|
segs, nsegments);
|
|
/* Modify the size field, based on sg address size. */
|
|
cmd7k->generic.size +=
|
|
((TWA_64BIT_ADDRESSES ? 3 : 2) * nsegments);
|
|
}
|
|
|
|
if (tr->tr_flags & TWA_CMD_DATA_IN)
|
|
bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map,
|
|
BUS_DMASYNC_PREREAD);
|
|
if (tr->tr_flags & TWA_CMD_DATA_OUT) {
|
|
/*
|
|
* If we're using an alignment buffer, and we're
|
|
* writing data, copy the real data out.
|
|
*/
|
|
if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED)
|
|
bcopy(tr->tr_real_data, tr->tr_data, tr->tr_real_length);
|
|
bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map,
|
|
BUS_DMASYNC_PREWRITE);
|
|
}
|
|
error = twa_submit_io(tr);
|
|
|
|
out:
|
|
if (error) {
|
|
twa_unmap_request(tr);
|
|
/*
|
|
* If the caller had been returned EINPROGRESS, and he has
|
|
* registered a callback for handling completion, the callback
|
|
* will never get called because we were unable to submit the
|
|
* request. So, free up the request right here.
|
|
*/
|
|
if ((tr->tr_flags & TWA_CMD_IN_PROGRESS) && (tr->tr_callback))
|
|
twa_release_request(tr);
|
|
}
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
* Function name: twa_setup_request_dmamap
|
|
* Description: Callback of bus_dmamap_load for the buffer associated
|
|
* with a cmd pkt.
|
|
*
|
|
* Input: arg -- ptr to request pkt
|
|
* segs -- ptr to a list of segment descriptors
|
|
* nsegments--# of segments
|
|
* error -- 0 if no errors encountered before callback,
|
|
* non-zero if errors were encountered
|
|
* Output: None
|
|
* Return value: None
|
|
*/
|
|
static void
|
|
twa_setup_request_dmamap(void *arg, bus_dma_segment_t *segs,
|
|
int nsegments, int error)
|
|
{
|
|
struct twa_softc *sc = (struct twa_softc *)arg;
|
|
|
|
twa_dbg_dprint_enter(10, sc);
|
|
|
|
sc->twa_cmd_pkt_phys = segs[0].ds_addr;
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
* Function name: twa_map_request
|
|
* Description: Maps a cmd pkt and data associated with it, into
|
|
* DMA'able memory.
|
|
*
|
|
* Input: tr -- ptr to request pkt
|
|
* Output: None
|
|
* Return value: 0 -- success
|
|
* non-zero-- failure
|
|
*/
|
|
int
|
|
twa_map_request(struct twa_request *tr)
|
|
{
|
|
struct twa_softc *sc = tr->tr_sc;
|
|
int error = 0;
|
|
|
|
twa_dbg_dprint_enter(10, sc);
|
|
|
|
/* If the command involves data, map that too. */
|
|
if (tr->tr_data != NULL) {
|
|
/*
|
|
* It's sufficient for the data pointer to be 4-byte aligned
|
|
* to work with 9000. However, if 4-byte aligned addresses
|
|
* are passed to bus_dmamap_load, we can get back sg elements
|
|
* that are not 512-byte multiples in size. So, we will let
|
|
* only those buffers that are 512-byte aligned to pass
|
|
* through, and bounce the rest, so as to make sure that we
|
|
* always get back sg elements that are 512-byte multiples
|
|
* in size.
|
|
*/
|
|
if (((vm_offset_t)tr->tr_data % 512) || (tr->tr_length % 512)) {
|
|
tr->tr_flags |= TWA_CMD_DATA_COPY_NEEDED;
|
|
tr->tr_real_data = tr->tr_data; /* save original data pointer */
|
|
tr->tr_real_length = tr->tr_length; /* save original data length */
|
|
tr->tr_length = (tr->tr_length + 511) & ~511;
|
|
tr->tr_data = malloc(tr->tr_length, TWA_MALLOC_CLASS, M_NOWAIT);
|
|
if (tr->tr_data == NULL) {
|
|
twa_printf(sc, "%s: malloc failed\n", __func__);
|
|
tr->tr_data = tr->tr_real_data; /* restore original data pointer */
|
|
tr->tr_length = tr->tr_real_length; /* restore original data length */
|
|
return(ENOMEM);
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Map the data buffer into bus space and build the s/g list.
|
|
*/
|
|
if ((error = bus_dmamap_load(sc->twa_dma_tag, tr->tr_dma_map,
|
|
tr->tr_data, tr->tr_length,
|
|
twa_setup_data_dmamap, tr,
|
|
BUS_DMA_WAITOK))) {
|
|
if (error == EINPROGRESS) {
|
|
tr->tr_flags |= TWA_CMD_IN_PROGRESS;
|
|
if (tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_EXTERNAL)
|
|
twa_disallow_new_requests(sc);
|
|
error = 0;
|
|
} else {
|
|
/* Free alignment buffer if it was used. */
|
|
if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) {
|
|
free(tr->tr_data, TWA_MALLOC_CLASS);
|
|
tr->tr_data = tr->tr_real_data; /* restore 'real' data pointer */
|
|
tr->tr_length = tr->tr_real_length;/* restore 'real' data length */
|
|
}
|
|
}
|
|
} else
|
|
error = tr->tr_error;
|
|
|
|
} else
|
|
if ((error = twa_submit_io(tr)))
|
|
twa_unmap_request(tr);
|
|
|
|
return(error);
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
* Function name: twa_unmap_request
|
|
* Description: Undoes the mapping done by twa_map_request.
|
|
*
|
|
* Input: tr -- ptr to request pkt
|
|
* Output: None
|
|
* Return value: None
|
|
*/
|
|
void
|
|
twa_unmap_request(struct twa_request *tr)
|
|
{
|
|
struct twa_softc *sc = tr->tr_sc;
|
|
u_int8_t cmd_status;
|
|
|
|
twa_dbg_dprint_enter(10, sc);
|
|
|
|
/* If the command involved data, unmap that too. */
|
|
if (tr->tr_data != NULL) {
|
|
if (tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_9K)
|
|
cmd_status = tr->tr_command->command.cmd_pkt_9k.status;
|
|
else
|
|
cmd_status = tr->tr_command->command.cmd_pkt_7k.generic.status;
|
|
|
|
if (tr->tr_flags & TWA_CMD_DATA_IN) {
|
|
bus_dmamap_sync(sc->twa_dma_tag,
|
|
tr->tr_dma_map, BUS_DMASYNC_POSTREAD);
|
|
|
|
/*
|
|
* If we are using a bounce buffer, and we are reading
|
|
* data, copy the real data in.
|
|
*/
|
|
if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED)
|
|
if (cmd_status == 0)
|
|
bcopy(tr->tr_data, tr->tr_real_data,
|
|
tr->tr_real_length);
|
|
}
|
|
if (tr->tr_flags & TWA_CMD_DATA_OUT)
|
|
bus_dmamap_sync(sc->twa_dma_tag, tr->tr_dma_map,
|
|
BUS_DMASYNC_POSTWRITE);
|
|
|
|
bus_dmamap_unload(sc->twa_dma_tag, tr->tr_dma_map);
|
|
}
|
|
|
|
/* Free alignment buffer if it was used. */
|
|
if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) {
|
|
free(tr->tr_data, TWA_MALLOC_CLASS);
|
|
tr->tr_data = tr->tr_real_data; /* restore 'real' data pointer */
|
|
tr->tr_length = tr->tr_real_length;/* restore 'real' data length */
|
|
}
|
|
}
|
|
|
|
|
|
|
|
#ifdef TWA_DEBUG
|
|
void twa_report(void);
|
|
void twa_reset_stats(void);
|
|
void twa_print_request(struct twa_request *tr, int req_type);
|
|
|
|
|
|
|
|
/*
|
|
* Function name: twa_report
|
|
* Description: For being called from ddb. Prints controller stats,
|
|
* and requests, if any, that are in the wrong queue.
|
|
*
|
|
* Input: None
|
|
* Output: None
|
|
* Return value: None
|
|
*/
|
|
void
|
|
twa_report(void)
|
|
{
|
|
struct twa_softc *sc;
|
|
struct twa_request *tr;
|
|
int s;
|
|
int i;
|
|
|
|
s = splcam();
|
|
for (i = 0; (sc = devclass_get_softc(twa_devclass, i)) != NULL; i++) {
|
|
twa_print_controller(sc);
|
|
TAILQ_FOREACH(tr, &sc->twa_busy, tr_link)
|
|
twa_print_request(tr, TWA_CMD_BUSY);
|
|
TAILQ_FOREACH(tr, &sc->twa_complete, tr_link)
|
|
twa_print_request(tr, TWA_CMD_COMPLETE);
|
|
}
|
|
splx(s);
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
* Function name: twa_reset_stats
|
|
* Description: For being called from ddb.
|
|
* Resets some controller stats.
|
|
*
|
|
* Input: None
|
|
* Output: None
|
|
* Return value: None
|
|
*/
|
|
void
|
|
twa_reset_stats(void)
|
|
{
|
|
struct twa_softc *sc;
|
|
int s;
|
|
int i;
|
|
|
|
s = splcam();
|
|
for (i = 0; (sc = devclass_get_softc(twa_devclass, i)) != NULL; i++) {
|
|
sc->twa_qstats[TWAQ_FREE].q_max = 0;
|
|
sc->twa_qstats[TWAQ_BUSY].q_max = 0;
|
|
sc->twa_qstats[TWAQ_PENDING].q_max = 0;
|
|
sc->twa_qstats[TWAQ_COMPLETE].q_max = 0;
|
|
}
|
|
splx(s);
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
* Function name: twa_print_request
|
|
* Description: Prints a given request if it's in the wrong queue.
|
|
*
|
|
* Input: tr -- ptr to request pkt
|
|
* req_type-- expected status of the given request
|
|
* Output: None
|
|
* Return value: None
|
|
*/
|
|
void
|
|
twa_print_request(struct twa_request *tr, int req_type)
|
|
{
|
|
struct twa_softc *sc = tr->tr_sc;
|
|
struct twa_command_packet *cmdpkt = tr->tr_command;
|
|
struct twa_command_9k *cmd9k;
|
|
union twa_command_7k *cmd7k;
|
|
u_int8_t *cdb;
|
|
int cmd_phys_addr;
|
|
|
|
if (tr->tr_status != req_type) {
|
|
twa_printf(sc, "Invalid %s request %p in queue! req_type = %x, queue_type = %x\n",
|
|
(tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_INTERNAL) ? "INTERNAL" : "EXTERNAL",
|
|
tr, tr->tr_status, req_type);
|
|
|
|
if (tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_9K) {
|
|
cmd9k = &(cmdpkt->command.cmd_pkt_9k);
|
|
cmd_phys_addr = cmd9k->sg_list[0].address;
|
|
twa_printf(sc, "9K cmd = %x %x %x %x %x %x %x %x %jx\n",
|
|
cmd9k->command.opcode,
|
|
cmd9k->command.reserved,
|
|
cmd9k->unit,
|
|
cmd9k->request_id,
|
|
cmd9k->status,
|
|
cmd9k->sgl_offset,
|
|
cmd9k->sgl_entries,
|
|
cmd_phys_addr,
|
|
(uintmax_t)cmd9k->sg_list[0].length);
|
|
cdb = (u_int8_t *)(cmdpkt->command.cmd_pkt_9k.cdb);
|
|
twa_printf(sc, "cdb = %x %x %x %x %x %x %x %x %x %x %x %x %x %x %x %x\n",
|
|
cdb[0], cdb[1], cdb[2], cdb[3], cdb[4], cdb[5], cdb[6], cdb[7],
|
|
cdb[8], cdb[9], cdb[10], cdb[11], cdb[12], cdb[13], cdb[14], cdb[15]);
|
|
} else {
|
|
cmd7k = &(cmdpkt->command.cmd_pkt_7k);
|
|
twa_printf(sc, "7K cmd = %x %x %x %x %x %x %x %x %x\n",
|
|
cmd7k->generic.opcode,
|
|
cmd7k->generic.sgl_offset,
|
|
cmd7k->generic.size,
|
|
cmd7k->generic.request_id,
|
|
cmd7k->generic.unit,
|
|
cmd7k->generic.host_id,
|
|
cmd7k->generic.status,
|
|
cmd7k->generic.flags,
|
|
cmd7k->generic.count);
|
|
}
|
|
|
|
cmd_phys_addr = (int)(tr->tr_cmd_phys);
|
|
twa_printf(sc, "cmdphys=0x%x data=%p length=0x%jx\n",
|
|
cmd_phys_addr, tr->tr_data, (uintmax_t)tr->tr_length);
|
|
twa_printf(sc, "req_id=0x%x flags=0x%x callback=%p private=%p\n",
|
|
tr->tr_request_id, tr->tr_flags,
|
|
tr->tr_callback, tr->tr_private);
|
|
}
|
|
}
|
|
#endif
|