446 lines
10 KiB
C
446 lines
10 KiB
C
/*-
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* Copyright (c) 2006 M. Warner Losh. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/conf.h>
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#include <sys/kernel.h>
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#include <sys/lock.h>
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#include <sys/mbuf.h>
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#include <sys/malloc.h>
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#include <sys/module.h>
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#include <sys/mutex.h>
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#include <sys/rman.h>
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#include <machine/bus.h>
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#include <arm/at91/at91rm92reg.h>
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#include <arm/at91/at91_twireg.h>
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#include <dev/iicbus/iiconf.h>
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#include <dev/iicbus/iicbus.h>
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#include "iicbus_if.h"
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struct at91_twi_softc
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{
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device_t dev; /* Myself */
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void *intrhand; /* Interrupt handle */
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struct resource *irq_res; /* IRQ resource */
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struct resource *mem_res; /* Memory resource */
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struct mtx sc_mtx; /* basically a perimeter lock */
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int flags;
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#define RXRDY 4
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#define TXRDY 0x10
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uint32_t cwgr;
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int sc_started;
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int twi_addr;
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device_t iicbus;
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};
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static inline uint32_t
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RD4(struct at91_twi_softc *sc, bus_size_t off)
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{
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return bus_read_4(sc->mem_res, off);
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}
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static inline void
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WR4(struct at91_twi_softc *sc, bus_size_t off, uint32_t val)
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{
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bus_write_4(sc->mem_res, off, val);
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}
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#define AT91_TWI_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx)
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#define AT91_TWI_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx)
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#define AT91_TWI_LOCK_INIT(_sc) \
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mtx_init(&_sc->sc_mtx, device_get_nameunit(_sc->dev), \
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"twi", MTX_DEF)
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#define AT91_TWI_LOCK_DESTROY(_sc) mtx_destroy(&_sc->sc_mtx);
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#define AT91_TWI_ASSERT_LOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_OWNED);
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#define AT91_TWI_ASSERT_UNLOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_NOTOWNED);
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#define TWI_DEF_CLK 100000
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static devclass_t at91_twi_devclass;
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/* bus entry points */
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static int at91_twi_probe(device_t dev);
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static int at91_twi_attach(device_t dev);
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static int at91_twi_detach(device_t dev);
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static void at91_twi_intr(void *);
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/* helper routines */
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static int at91_twi_activate(device_t dev);
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static void at91_twi_deactivate(device_t dev);
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static int
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at91_twi_probe(device_t dev)
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{
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device_set_desc(dev, "TWI");
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return (0);
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}
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static int
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at91_twi_attach(device_t dev)
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{
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struct at91_twi_softc *sc = device_get_softc(dev);
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int err;
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sc->dev = dev;
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err = at91_twi_activate(dev);
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if (err)
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goto out;
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AT91_TWI_LOCK_INIT(sc);
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/*
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* Activate the interrupt
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*/
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err = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_MISC | INTR_MPSAFE,
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at91_twi_intr, sc, &sc->intrhand);
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if (err) {
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AT91_TWI_LOCK_DESTROY(sc);
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goto out;
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}
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sc->cwgr = TWI_CWGR_CKDIV(8 * AT91C_MASTER_CLOCK / 90000) |
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TWI_CWGR_CHDIV(TWI_CWGR_DIV(TWI_DEF_CLK)) |
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TWI_CWGR_CLDIV(TWI_CWGR_DIV(TWI_DEF_CLK));
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WR4(sc, TWI_CR, TWI_CR_SWRST);
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WR4(sc, TWI_CR, TWI_CR_MSEN | TWI_CR_SVDIS);
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WR4(sc, TWI_CWGR, sc->cwgr);
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WR4(sc, TWI_IER, TWI_SR_RXRDY | TWI_SR_OVRE | TWI_SR_UNRE |
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TWI_SR_NACK);
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if ((sc->iicbus = device_add_child(dev, "iicbus", -1)) == NULL)
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device_printf(dev, "could not allocate iicbus instance\n");
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/* probe and attach the iicbus */
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bus_generic_attach(dev);
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out:;
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if (err)
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at91_twi_deactivate(dev);
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return (err);
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}
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static int
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at91_twi_detach(device_t dev)
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{
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struct at91_twi_softc *sc;
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int rv;
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sc = device_get_softc(dev);
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at91_twi_deactivate(dev);
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if (sc->iicbus && (rv = device_delete_child(dev, sc->iicbus)) != 0)
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return (rv);
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return (0);
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}
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static int
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at91_twi_activate(device_t dev)
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{
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struct at91_twi_softc *sc;
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int rid;
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sc = device_get_softc(dev);
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rid = 0;
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sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
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RF_ACTIVE);
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if (sc->mem_res == NULL)
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goto errout;
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rid = 0;
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sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
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RF_ACTIVE);
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if (sc->mem_res == NULL)
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goto errout;
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return (0);
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errout:
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at91_twi_deactivate(dev);
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return (ENOMEM);
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}
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static void
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at91_twi_deactivate(device_t dev)
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{
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struct at91_twi_softc *sc;
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sc = device_get_softc(dev);
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if (sc->intrhand)
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bus_teardown_intr(dev, sc->irq_res, sc->intrhand);
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sc->intrhand = 0;
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bus_generic_detach(sc->dev);
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if (sc->mem_res)
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bus_release_resource(dev, SYS_RES_IOPORT,
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rman_get_rid(sc->mem_res), sc->mem_res);
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sc->mem_res = 0;
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if (sc->irq_res)
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bus_release_resource(dev, SYS_RES_IRQ,
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rman_get_rid(sc->irq_res), sc->irq_res);
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sc->irq_res = 0;
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return;
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}
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static void
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at91_twi_intr(void *xsc)
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{
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struct at91_twi_softc *sc = xsc;
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uint32_t status;
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/* Reading the status also clears the interrupt */
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status = RD4(sc, TWI_SR);
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printf("status %x\n", status);
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if (status == 0)
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return;
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AT91_TWI_LOCK(sc);
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if (status & TWI_SR_RXRDY)
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sc->flags |= RXRDY;
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if (status & TWI_SR_TXRDY)
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sc->flags |= TXRDY;
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AT91_TWI_UNLOCK(sc);
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wakeup(sc);
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return;
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}
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static int
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at91_twi_wait_stop_done(struct at91_twi_softc *sc)
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{
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int err = 0;
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while (!(RD4(sc, TWI_SR) & TWI_SR_TXCOMP))
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continue;
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return (err);
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}
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/*
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* Stop the transfer by entering a STOP state on the iic bus. For read
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* operations, we've already entered the STOP state, since we need to do
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* that to read the last character. For write operations, we need to
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* wait for the TXCOMP bit to turn on before returning.
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*/
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static int
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at91_twi_stop(device_t dev)
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{
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struct at91_twi_softc *sc;
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int err = 0;
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sc = device_get_softc(dev);
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if (sc->sc_started) {
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WR4(sc, TWI_CR, TWI_CR_STOP);
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err = at91_twi_wait_stop_done(sc);
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}
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return (err);
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}
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/*
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* enter a START condition without requiring the device to be in a STOP
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* state.
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*/
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static int
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at91_twi_repeated_start(device_t dev, u_char slave, int timeout)
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{
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struct at91_twi_softc *sc;
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sc = device_get_softc(dev);
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WR4(sc, TWI_MMR, TWI_MMR_DADR(slave));
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WR4(sc, TWI_CR, TWI_CR_START);
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sc->sc_started = 1;
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return (0);
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}
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/*
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* enter a START condition from an idle state.
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*/
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static int
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at91_twi_start(device_t dev, u_char slave, int timeout)
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{
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struct at91_twi_softc *sc;
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sc = device_get_softc(dev);
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WR4(sc, TWI_MMR, TWI_MMR_DADR(slave));
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WR4(sc, TWI_CR, TWI_CR_START);
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sc->sc_started = 1;
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return (0);
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}
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static int
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at91_twi_write(device_t dev, char *buf, int len, int *sent, int timeout /* us */)
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{
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struct at91_twi_softc *sc;
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uint8_t *walker;
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int err = 0;
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walker = buf;
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sc = device_get_softc(dev);
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WR4(sc, TWI_MMR, TWI_MMR_MWRITE | RD4(sc, TWI_MMR));
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AT91_TWI_LOCK(sc);
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WR4(sc, TWI_IER, TWI_SR_TXRDY);
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while (len--) {
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WR4(sc, TWI_THR, *walker++);
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while (!(sc->flags & TXRDY)) {
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err = msleep(sc, &sc->sc_mtx, PZERO | PCATCH, "twiwr",
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0);
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if (err)
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goto errout;
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}
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}
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errout:;
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WR4(sc, TWI_IDR, TWI_SR_TXRDY);
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AT91_TWI_UNLOCK(sc);
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return (err);
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}
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static int
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at91_twi_read(device_t dev, char *buf, int len, int *read, int last,
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int delay /* us */)
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{
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struct at91_twi_softc *sc;
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char *walker;
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int err = 0;
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walker = buf;
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sc = device_get_softc(dev);
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AT91_TWI_LOCK(sc);
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WR4(sc, TWI_MMR, ~TWI_MMR_MWRITE & RD4(sc, TWI_MMR));
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WR4(sc, TWI_IER, TWI_SR_RXRDY);
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while (len-- > 0) {
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err = 0;
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while (!(sc->flags & RXRDY)) {
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err = msleep(sc, &sc->sc_mtx, PZERO | PCATCH, "twird",
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0);
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if (err)
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goto errout;
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}
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sc->flags &= ~RXRDY;
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*walker++ = RD4(sc, TWI_RHR) & 0xff;
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if (len == 1 && last)
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break;
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}
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if (!last)
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goto errout;
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WR4(sc, TWI_CR, TWI_CR_STOP);
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err = at91_twi_wait_stop_done(sc);
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*walker = RD4(sc, TWI_RHR) & 0xff;
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if (read)
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*read = walker - buf;
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sc->sc_started = 0;
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errout:;
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WR4(sc, TWI_IDR, TWI_SR_RXRDY);
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AT91_TWI_UNLOCK(sc);
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return (err);
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}
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static int
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at91_twi_rst_card(device_t dev, u_char speed, u_char addr, u_char *oldaddr)
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{
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struct at91_twi_softc *sc;
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int ckdiv, rate;
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sc = device_get_softc(dev);
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if (oldaddr)
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*oldaddr = sc->twi_addr;
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if (addr != 0)
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sc->twi_addr = 0;
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else
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sc->twi_addr = addr;
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rate = 1;
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/*
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* 8 * is because "rate == 1" -> 4 clocks down, 4 clocks up. The
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* speeds are for 1.5kb/s, 45kb/s and 90kb/s.
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*/
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switch (speed) {
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case IIC_SLOW:
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ckdiv = 8 * AT91C_MASTER_CLOCK / 1500;
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break;
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case IIC_FAST:
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ckdiv = 8 * AT91C_MASTER_CLOCK / 45000;
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break;
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case IIC_UNKNOWN:
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case IIC_FASTEST:
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default:
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ckdiv = 8 * AT91C_MASTER_CLOCK / 90000;
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break;
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}
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sc->cwgr = TWI_CWGR_CKDIV(ckdiv) | TWI_CWGR_CHDIV(TWI_CWGR_DIV(rate)) |
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TWI_CWGR_CLDIV(TWI_CWGR_DIV(rate));
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WR4(sc, TWI_CR, TWI_CR_SWRST);
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WR4(sc, TWI_CR, TWI_CR_MSEN | TWI_CR_SVDIS);
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WR4(sc, TWI_CWGR, sc->cwgr);
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return EIO;
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}
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static int
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at91_twi_callback(device_t dev, int index, caddr_t *data)
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{
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int error = 0;
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switch (index) {
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case IIC_REQUEST_BUS:
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break;
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case IIC_RELEASE_BUS:
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break;
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default:
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error = EINVAL;
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}
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return (error);
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}
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static device_method_t at91_twi_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, at91_twi_probe),
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DEVMETHOD(device_attach, at91_twi_attach),
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DEVMETHOD(device_detach, at91_twi_detach),
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/* iicbus interface */
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DEVMETHOD(iicbus_callback, at91_twi_callback),
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DEVMETHOD(iicbus_repeated_start, at91_twi_repeated_start),
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DEVMETHOD(iicbus_start, at91_twi_start),
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DEVMETHOD(iicbus_stop, at91_twi_stop),
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DEVMETHOD(iicbus_write, at91_twi_write),
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DEVMETHOD(iicbus_read, at91_twi_read),
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DEVMETHOD(iicbus_reset, at91_twi_rst_card),
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{ 0, 0 }
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};
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static driver_t at91_twi_driver = {
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"at91_twi",
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at91_twi_methods,
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sizeof(struct at91_twi_softc),
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};
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DRIVER_MODULE(at91_twi, atmelarm, at91_twi_driver, at91_twi_devclass, 0, 0);
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