d6aa8a03f2
D8376 extended softfloat/hardfloat support, but used a macro that never actually gets set except in libc and msun's Makefile.inc. So libc and libm got built correctly, but any program including fenv.h itself assumed it was on a hardfloat systen and emitted inline fpu instructions for fedisableexcept() and friends. Using __mips_soft_float makes everything work in all cases, since it's a compiler-internal macro that is always set correctly for the target PR: 217845 Submitted by: Dan Nelson <dnelson_1901@yahoo.com> MFC after: 1 week
282 lines
5.9 KiB
C
282 lines
5.9 KiB
C
/*-
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* Copyright (c) 2004-2005 David Schultz <das@FreeBSD.ORG>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _FENV_H_
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#define _FENV_H_
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#include <sys/_types.h>
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#ifndef __fenv_static
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#define __fenv_static static
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#endif
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typedef __uint32_t fenv_t;
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typedef __uint32_t fexcept_t;
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/* Exception flags */
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#ifdef __mips_soft_float
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#define _FPUSW_SHIFT 16
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#define FE_INVALID 0x0001
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#define FE_DIVBYZERO 0x0002
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#define FE_OVERFLOW 0x0004
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#define FE_UNDERFLOW 0x0008
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#define FE_INEXACT 0x0010
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#else
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#define _FCSR_CAUSE_SHIFT 10
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#define FE_INVALID 0x0040
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#define FE_DIVBYZERO 0x0020
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#define FE_OVERFLOW 0x0010
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#define FE_UNDERFLOW 0x0008
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#define FE_INEXACT 0x0004
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#endif
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#define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_INEXACT | \
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FE_INVALID | FE_OVERFLOW | FE_UNDERFLOW)
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/* Rounding modes */
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#define FE_TONEAREST 0x0000
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#define FE_TOWARDZERO 0x0001
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#define FE_UPWARD 0x0002
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#define FE_DOWNWARD 0x0003
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#define _ROUND_MASK (FE_TONEAREST | FE_DOWNWARD | \
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FE_UPWARD | FE_TOWARDZERO)
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__BEGIN_DECLS
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/* Default floating-point environment */
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extern const fenv_t __fe_dfl_env;
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#define FE_DFL_ENV (&__fe_dfl_env)
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/* We need to be able to map status flag positions to mask flag positions */
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#define _ENABLE_SHIFT 5
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#define _ENABLE_MASK (FE_ALL_EXCEPT << _ENABLE_SHIFT)
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#if !defined(__mips_soft_float) && !defined(__mips_hard_float)
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#error compiler didnt set soft/hard float macros
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#endif
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#ifndef __mips_soft_float
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#define __cfc1(__fcsr) __asm __volatile("cfc1 %0, $31" : "=r" (__fcsr))
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#define __ctc1(__fcsr) __asm __volatile("ctc1 %0, $31" :: "r" (__fcsr))
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#endif
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#ifdef __mips_soft_float
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int feclearexcept(int __excepts);
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int fegetexceptflag(fexcept_t *__flagp, int __excepts);
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int fesetexceptflag(const fexcept_t *__flagp, int __excepts);
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int feraiseexcept(int __excepts);
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int fetestexcept(int __excepts);
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int fegetround(void);
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int fesetround(int __round);
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int fegetenv(fenv_t *__envp);
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int feholdexcept(fenv_t *__envp);
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int fesetenv(const fenv_t *__envp);
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int feupdateenv(const fenv_t *__envp);
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#else
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__fenv_static inline int
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feclearexcept(int __excepts)
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{
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fexcept_t fcsr;
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__excepts &= FE_ALL_EXCEPT;
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__cfc1(fcsr);
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fcsr &= ~(__excepts | (__excepts << _FCSR_CAUSE_SHIFT));
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__ctc1(fcsr);
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return (0);
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}
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__fenv_static inline int
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fegetexceptflag(fexcept_t *__flagp, int __excepts)
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{
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fexcept_t fcsr;
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__excepts &= FE_ALL_EXCEPT;
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__cfc1(fcsr);
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*__flagp = fcsr & __excepts;
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return (0);
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}
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__fenv_static inline int
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fesetexceptflag(const fexcept_t *__flagp, int __excepts)
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{
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fexcept_t fcsr;
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__excepts &= FE_ALL_EXCEPT;
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__cfc1(fcsr);
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fcsr &= ~__excepts;
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fcsr |= *__flagp & __excepts;
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__ctc1(fcsr);
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return (0);
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}
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__fenv_static inline int
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feraiseexcept(int __excepts)
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{
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fexcept_t fcsr;
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__excepts &= FE_ALL_EXCEPT;
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__cfc1(fcsr);
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fcsr |= __excepts | (__excepts << _FCSR_CAUSE_SHIFT);
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__ctc1(fcsr);
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return (0);
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}
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__fenv_static inline int
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fetestexcept(int __excepts)
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{
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fexcept_t fcsr;
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__excepts &= FE_ALL_EXCEPT;
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__cfc1(fcsr);
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return (fcsr & __excepts);
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}
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__fenv_static inline int
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fegetround(void)
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{
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fexcept_t fcsr;
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__cfc1(fcsr);
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return (fcsr & _ROUND_MASK);
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}
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__fenv_static inline int
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fesetround(int __round)
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{
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fexcept_t fcsr;
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if (__round & ~_ROUND_MASK)
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return (-1);
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__cfc1(fcsr);
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fcsr &= ~_ROUND_MASK;
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fcsr |= __round;
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__ctc1(fcsr);
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return (0);
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}
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__fenv_static inline int
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fegetenv(fenv_t *__envp)
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{
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__cfc1(*__envp);
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return (0);
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}
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__fenv_static inline int
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feholdexcept(fenv_t *__envp)
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{
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fexcept_t fcsr;
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__cfc1(fcsr);
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*__envp = fcsr;
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fcsr &= ~(FE_ALL_EXCEPT | _ENABLE_MASK);
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__ctc1(fcsr);
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return (0);
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}
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__fenv_static inline int
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fesetenv(const fenv_t *__envp)
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{
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__ctc1(*__envp);
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return (0);
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}
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__fenv_static inline int
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feupdateenv(const fenv_t *__envp)
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{
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fexcept_t fcsr;
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__cfc1(fcsr);
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fesetenv(__envp);
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feraiseexcept(fcsr);
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return (0);
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}
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#endif /* !__mips_soft_float */
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#if __BSD_VISIBLE
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/* We currently provide no external definitions of the functions below. */
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#ifdef __mips_soft_float
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int feenableexcept(int __mask);
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int fedisableexcept(int __mask);
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int fegetexcept(void);
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#else
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static inline int
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feenableexcept(int __mask)
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{
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fenv_t __old_fcsr, __new_fcsr;
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__cfc1(__old_fcsr);
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__new_fcsr = __old_fcsr | (__mask & FE_ALL_EXCEPT) << _ENABLE_SHIFT;
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__ctc1(__new_fcsr);
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return ((__old_fcsr >> _ENABLE_SHIFT) & FE_ALL_EXCEPT);
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}
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static inline int
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fedisableexcept(int __mask)
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{
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fenv_t __old_fcsr, __new_fcsr;
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__cfc1(__old_fcsr);
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__new_fcsr = __old_fcsr & ~((__mask & FE_ALL_EXCEPT) << _ENABLE_SHIFT);
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__ctc1(__new_fcsr);
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return ((__old_fcsr >> _ENABLE_SHIFT) & FE_ALL_EXCEPT);
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}
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static inline int
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fegetexcept(void)
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{
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fexcept_t fcsr;
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__cfc1(fcsr);
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return ((fcsr & _ENABLE_MASK) >> _ENABLE_SHIFT);
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}
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#endif /* !__mips_soft_float */
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#endif /* __BSD_VISIBLE */
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__END_DECLS
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#endif /* !_FENV_H_ */
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