96 lines
3.8 KiB
C
96 lines
3.8 KiB
C
/*-
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* Copyright (c) 1991 The Regents of the University of California.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: @(#)fdreg.h 7.1 (Berkeley) 5/9/91
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* $FreeBSD$
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*/
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/*
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* AT floppy controller registers and bitfields
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*/
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/* uses NEC765 controller */
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#include <dev/ic/nec765.h>
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#ifdef PC98
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/* registers */
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#define FDSTS 0 /* NEC 765 Main Status Register (R) */
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#define FDDATA 1 /* NEC 765 Data Register (R/W) */
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#define FDCTL 2 /* FD Control Register */
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#define FDC_RST 0x80 /* FDC RESET */
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#define FDC_RDY 0x40 /* force READY */
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#define FDC_DD 0x20 /* FDD Mode Exchange 0:1M 1:640K */
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#define FDC_DMAE 0x10 /* enable floppy DMA */
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#define FDC_MTON 0x08 /* MOTOR ON (when EMTON=1)*/
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#define FDC_TMSK 0x04 /* TIMER MASK */
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#define FDC_TTRG 0x01 /* TIMER TRIGER */
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#define FDP_EMTON 0x04 /* enable MTON */
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#define FDP_FDDEXC 0x02 /* FDD Mode Exchange 1:1M 0:640K */
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#define FDP_PORTEXC 0x01 /* PORT Exchane 1:1M 0:640K */
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#else
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/* registers */
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#define FDOUT 2 /* Digital Output Register (W) */
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#define FDO_FDSEL 0x03 /* floppy device select */
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#define FDO_FRST 0x04 /* floppy controller reset */
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#define FDO_FDMAEN 0x08 /* enable floppy DMA and Interrupt */
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#define FDO_MOEN0 0x10 /* motor enable drive 0 */
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#define FDO_MOEN1 0x20 /* motor enable drive 1 */
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#define FDO_MOEN2 0x40 /* motor enable drive 2 */
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#define FDO_MOEN3 0x80 /* motor enable drive 3 */
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#define FDSTS 4 /* NEC 765 Main Status Register (R) */
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#define FDDATA 5 /* NEC 765 Data Register (R/W) */
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#define FDCTL 7 /* Control Register (W) */
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#endif /* PC98 */
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#ifndef FDC_500KBPS
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# define FDC_500KBPS 0x00 /* 500KBPS MFM drive transfer rate */
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# define FDC_300KBPS 0x01 /* 300KBPS MFM drive transfer rate */
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# define FDC_250KBPS 0x02 /* 250KBPS MFM drive transfer rate */
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# define FDC_125KBPS 0x03 /* 125KBPS FM drive transfer rate */
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/* for some controllers 1MPBS instead */
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#endif /* FDC_500KBPS */
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/*
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* this is the secret PIO data port (offset from base)
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*/
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#define FDC_YE_DATAPORT 6
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#ifndef PC98
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#define FDIN 7 /* Digital Input Register (R) */
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#define FDI_DCHG 0x80 /* diskette has been changed */
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/* requires drive and motor being selected */
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/* is cleared by any step pulse to drive */
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#endif
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