ed 8a2fa414aa Add a Saved Process Status Register bit for AArch32 execution mode. ... The documentation on the Saved Process Status Register (SPSR) is a bit weird; the M[4] bit is documented separately from M[3:0]. The M[4] bit can be toggled to switch to 32-bit execution mode. This functionality is orthogonal to M[3:0]. Change the definition of PSR_M_MASK to no longer include M[4]. Add a new definition, PSR_AARCH32 that can be used to toggle 32-bit independently. This bit will be used by the cloudabi32 code to force execution of userspace code in 32-bit mode. Reviewed by: andrew Differential Revision: https://reviews.freebsd.org/D13148		2017-11-26 14:56:23 +00:00
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acpica	Add support to find the arm64 serial using the ACPI tables. This uses the	2016-11-21 19:26:58 +00:00
arm64	Add a Saved Process Status Register bit for AArch32 execution mode.	2017-11-26 14:56:23 +00:00
cavium	If ofw_bus_msimap fails don't try to use the invalid MSI/MSI-X parent node.	2017-03-16 17:49:37 +00:00
cloudabi64	Correct some more places where TO_PTR() should be used.	2017-11-26 14:53:56 +00:00
conf	Temporarily disable VIMAGE on arm64	2017-11-24 19:21:21 +00:00
include	Add a Saved Process Status Register bit for AArch32 execution mode.	2017-11-26 14:56:23 +00:00