gallatin 3862469671 Mchines whose interrupts are not routed through the ISA pic were still ...

registering their interrupts with rman as though they were going through
the ISA pic.  This prevents a conflict between isa & pci for irqs on such
machines.

Also hookup the chipset struct before calling platform.pci_intr_init().
This allows me to call inw/outw down in the platform code.

Add interrupt printfs to match the CIA chipset.

Reviewed by: dfr
Tested by: wilko

1999-11-16 14:01:12 +00:00

..

apecs_pci.c

$Id$ -> $FreeBSD$

1999-08-28 01:08:13 +00:00

apecs.c

Mchines whose interrupts are not routed through the ISA pic were still

1999-11-16 14:01:12 +00:00

apecsreg.h

Lots of changes, including:

1998-08-10 07:53:59 +00:00

apecsvar.h

$Id$ -> $FreeBSD$

1999-08-28 01:08:13 +00:00

cia_pci.c

$Id$ -> $FreeBSD$

1999-08-28 01:08:13 +00:00

cia.c

useracc() the prequel:

1999-10-29 18:09:36 +00:00

ciareg.h

$Id$ -> $FreeBSD$

1999-08-28 01:08:13 +00:00

ciavar.h

$Id$ -> $FreeBSD$

1999-08-28 01:08:13 +00:00

lca_pci.c

$Id$ -> $FreeBSD$

1999-08-28 01:08:13 +00:00

lca.c

useracc() the prequel:

1999-10-29 18:09:36 +00:00

lcareg.h

Lots of changes, including:

1998-08-10 07:53:59 +00:00

lcavar.h

$Id$ -> $FreeBSD$

1999-08-28 01:08:13 +00:00

pci_eb64plus_intr.s

Added support for the DEC EB64PLUS systype. (part I)

1999-01-18 20:15:07 +00:00

pci_eb164_intr.s

Implement CIA interrupts.

1998-07-12 16:17:54 +00:00

pcibus.c

* Implement bus_set/get/delete_resource for pci.

1999-10-14 21:38:33 +00:00

pcibus.h

$Id$ -> $FreeBSD$

1999-08-28 01:08:13 +00:00

tsunami_pci.c

allow pci_ioctl to work with multi-hose alphas.

1999-10-12 22:10:53 +00:00

tsunami.c

Add a second direct map window to increase the maximum RAM this platform

1999-11-03 01:16:11 +00:00

tsunamireg.h

$Id$ -> $FreeBSD$

1999-08-28 01:08:13 +00:00

tsunamivar.h

allow pci_ioctl to work with multi-hose alphas.

1999-10-12 22:10:53 +00:00