yongari 92a044b3fb Use capability pointer to access PCIe registers rather than
directly access them at fixed address. Frequently the register
offset could be changed if additional PCI capabilities are added to
controller.
One odd thing is ET_PCIR_L0S_L1_LATENCY register. I think it's PCIe
link capabilities register but the location of the register does
not match with PCIe capability pointer + offset. I'm not sure it's
shadow register of PCIe link capabilities register.
2009-11-19 22:53:41 +00:00
..
2009-11-19 21:46:58 +00:00