peter 92efaa3886 Cap the initial PV and PTE table preallocations. Otherwise we explode ...

on the Itanium2 system I have when we use up *all* of the initial 256MB
direct mapped region before we are ready to dynamically expand it.

The machine that I have has 4 cpus and a very big hole in the middle.
This makes the bogus '(last_address - first_address) / PAGE_SIZE'
calculations especially dangerous and caused many millions of initial
PV/PTE's to be preallocated.

2002-07-17 23:21:59 +00:00

..

acpica

Update for new ACPICA import. Gah.

2002-07-17 23:14:41 +00:00

compile

Don't need the .keep_me files. Obrien and I committed past each other.

2001-07-01 23:35:44 +00:00

conf

Various comment and minor style fixes. No actual content changes.

2002-07-16 18:20:17 +00:00

ia32

Use suword32/64 and fuword32/64 like elsewhere instead of inventing

2002-06-20 06:45:43 +00:00

ia64

Cap the initial PV and PTE table preallocations. Otherwise we explode

2002-07-17 23:21:59 +00:00

include

Remove label_t and physadr, which seem to have never been used in

2002-07-10 15:47:59 +00:00

isa

Tidy up some loose ends.

2002-04-29 07:43:16 +00:00

pci

Delete legacy pcib code - we can't possibly work without acpi on ia64.

2001-10-06 10:09:57 +00:00