dc4ee6ca91
make use of it where possible. This primarily brings in support for newer hardware, and FreeBSD is not yet able to support the abundance of IRQs on new hardware and many features in the Ethernet driver. Because of the changes to IRQs in the Simple Executive, we have to maintain our own list of Octeon IRQs now, which probably can be pared-down and be specific to the CIU interrupt unit soon, and when other interrupt mechanisms are added they can maintain their own definitions. Remove unmasking of interrupts from within the UART device now that the function used is no longer present in the Simple Executive. The unmasking seems to have been gratuitous as this is more properly handled by the buses above the UART device, and seems to work on that basis.
121 lines
3.8 KiB
C
121 lines
3.8 KiB
C
/***********************license start***************
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* Copyright (c) 2003-2010 Cavium Inc. (support@cavium.com). All rights
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* reserved.
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided
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* with the distribution.
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* * Neither the name of Cavium Inc. nor the names of
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* its contributors may be used to endorse or promote products
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* derived from this software without specific prior written
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* permission.
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* This Software, including technical data, may be subject to U.S. export control
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* laws, including the U.S. Export Administration Act and its associated
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* regulations, and may be subject to export or import regulations in other
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* countries.
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* TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
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* AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS OR
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* WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO
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* THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR
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* DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM
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* SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE,
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* MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF
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* VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR
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* CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR
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* PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
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***********************license end**************************************/
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/**
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* @file
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*
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* Interface to power-throttle control, measurement, and debugging
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* facilities.
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*
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* <hr>$Revision: 70030 $<hr>
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*
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*/
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#ifndef __CVMX_POWER_THROTTLE_H__
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#define __CVMX_POWER_THROTTLE_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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enum cvmx_power_throttle_field_index {
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CVMX_PTH_INDEX_MAXPOW,
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CVMX_PTH_INDEX_POWER,
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CVMX_PTH_INDEX_THROTT,
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CVMX_PTH_INDEX_RESERVED,
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CVMX_PTH_INDEX_DISTAG,
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CVMX_PTH_INDEX_PERIOD,
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CVMX_PTH_INDEX_POWLIM,
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CVMX_PTH_INDEX_MAXTHR,
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CVMX_PTH_INDEX_MINTHR,
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CVMX_PTH_INDEX_HRMPOWADJ,
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CVMX_PTH_INDEX_OVRRD,
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CVMX_PTH_INDEX_MAX
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};
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typedef enum cvmx_power_throttle_field_index cvmx_power_throttle_field_index_t;
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/**
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* Throttle power to percentage% of configured maximum (MAXPOW).
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*
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* @param percentage 0 to 100
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* @return 0 for success and -1 for error.
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*/
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extern int cvmx_power_throttle_self(uint8_t percentage);
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/**
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* Throttle power to percentage% of configured maximum (MAXPOW)
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* for the cores identified in coremask.
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*
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* @param percentage 0 to 100
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* @param coremask bit mask where each bit identifies a core.
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* @return 0 for success and -1 for error.
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*/
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extern int cvmx_power_throttle(uint8_t percentage, uint64_t coremask);
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/**
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* The same functionality as cvmx_power_throttle() but it takes a
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* bitmap-based coremask as a parameter.
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*/
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extern int cvmx_power_throttle_bmp(uint8_t percentage,
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struct cvmx_coremask *pcm);
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/**
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* Get the i'th field of the power throttle register
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*
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* @param r is the value of the power throttle register
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* @param i is the index of the field
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*
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* @return (uint64_t)-1 on failure.
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*/
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extern uint64_t cvmx_power_throttle_get_field(uint64_t r,
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cvmx_power_throttle_field_index_t i);
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/**
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* Retrieve the content of the power throttle register of a core
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*
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* @param ppid is the core id
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*
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* @return (uint64_t)-1 on failure.
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*/
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extern uint64_t cvmx_power_throttle_get_register(int ppid);
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#ifdef __cplusplus
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}
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#endif
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#endif /* __CVMX_POWER_THROTTLE_H__ */
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