93fd264895
invoke it from nvmecontrol(8). Controller reset will be performed in cases where I/O are repeatedly timing out, the controller reports an unrecoverable condition, or when explicitly requested via IOCTL or an nvme consumer. Since the controller may be in such a state where it cannot even process queue deletion requests, we will perform a controller reset without trying to clean up anything on the controller first. Sponsored by: Intel Reviewed by: carl
378 lines
9.1 KiB
C
378 lines
9.1 KiB
C
/*-
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* Copyright (C) 2012 Intel Corporation
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/bus.h>
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#include <sys/conf.h>
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#include <sys/module.h>
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#include <vm/uma.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include "nvme_private.h"
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struct nvme_consumer {
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uint32_t id;
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nvme_cons_ns_fn_t ns_fn;
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nvme_cons_ctrlr_fn_t ctrlr_fn;
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nvme_cons_async_fn_t async_fn;
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};
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struct nvme_consumer nvme_consumer[NVME_MAX_CONSUMERS];
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#define INVALID_CONSUMER_ID 0xFFFF
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uma_zone_t nvme_request_zone;
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MALLOC_DEFINE(M_NVME, "nvme", "nvme(4) memory allocations");
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static int nvme_probe(device_t);
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static int nvme_attach(device_t);
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static int nvme_detach(device_t);
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static int nvme_modevent(module_t mod, int type, void *arg);
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static devclass_t nvme_devclass;
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static device_method_t nvme_pci_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, nvme_probe),
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DEVMETHOD(device_attach, nvme_attach),
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DEVMETHOD(device_detach, nvme_detach),
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{ 0, 0 }
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};
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static driver_t nvme_pci_driver = {
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"nvme",
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nvme_pci_methods,
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sizeof(struct nvme_controller),
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};
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DRIVER_MODULE(nvme, pci, nvme_pci_driver, nvme_devclass, nvme_modevent, 0);
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MODULE_VERSION(nvme, 1);
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static struct _pcsid
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{
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u_int32_t type;
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const char *desc;
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} pci_ids[] = {
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{ 0x01118086, "NVMe Controller" },
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{ CHATHAM_PCI_ID, "Chatham Prototype NVMe Controller" },
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{ IDT32_PCI_ID, "IDT NVMe Controller (32 channel)" },
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{ IDT8_PCI_ID, "IDT NVMe Controller (8 channel)" },
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{ 0x00000000, NULL }
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};
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static int
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nvme_probe (device_t device)
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{
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struct _pcsid *ep;
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u_int32_t type;
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type = pci_get_devid(device);
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ep = pci_ids;
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while (ep->type && ep->type != type)
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++ep;
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if (ep->desc) {
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device_set_desc(device, ep->desc);
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return (BUS_PROBE_DEFAULT);
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}
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#if defined(PCIS_STORAGE_NVM)
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if (pci_get_class(device) == PCIC_STORAGE &&
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pci_get_subclass(device) == PCIS_STORAGE_NVM &&
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pci_get_progif(device) == PCIP_STORAGE_NVM_ENTERPRISE_NVMHCI_1_0) {
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device_set_desc(device, "Generic NVMe Device");
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return (BUS_PROBE_GENERIC);
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}
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#endif
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return (ENXIO);
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}
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static void
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nvme_init(void)
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{
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uint32_t i;
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nvme_request_zone = uma_zcreate("nvme_request",
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sizeof(struct nvme_request), NULL, NULL, NULL, NULL, 0, 0);
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for (i = 0; i < NVME_MAX_CONSUMERS; i++)
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nvme_consumer[i].id = INVALID_CONSUMER_ID;
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}
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SYSINIT(nvme_register, SI_SUB_DRIVERS, SI_ORDER_SECOND, nvme_init, NULL);
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static void
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nvme_uninit(void)
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{
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uma_zdestroy(nvme_request_zone);
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}
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SYSUNINIT(nvme_unregister, SI_SUB_DRIVERS, SI_ORDER_SECOND, nvme_uninit, NULL);
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static void
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nvme_load(void)
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{
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}
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static void
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nvme_unload(void)
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{
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}
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static void
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nvme_shutdown(void)
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{
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device_t *devlist;
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struct nvme_controller *ctrlr;
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union cc_register cc;
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union csts_register csts;
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int dev, devcount;
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if (devclass_get_devices(nvme_devclass, &devlist, &devcount))
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return;
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for (dev = 0; dev < devcount; dev++) {
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/*
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* Only notify controller of shutdown when a real shutdown is
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* in process, not when a module unload occurs. It seems at
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* least some controllers (Chatham at least) don't let you
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* re-enable the controller after shutdown notification has
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* been received.
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*/
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ctrlr = DEVICE2SOFTC(devlist[dev]);
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cc.raw = nvme_mmio_read_4(ctrlr, cc);
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cc.bits.shn = NVME_SHN_NORMAL;
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nvme_mmio_write_4(ctrlr, cc, cc.raw);
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csts.raw = nvme_mmio_read_4(ctrlr, csts);
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while (csts.bits.shst != NVME_SHST_COMPLETE) {
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DELAY(5);
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csts.raw = nvme_mmio_read_4(ctrlr, csts);
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}
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}
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free(devlist, M_TEMP);
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}
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static int
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nvme_modevent(module_t mod, int type, void *arg)
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{
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switch (type) {
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case MOD_LOAD:
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nvme_load();
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break;
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case MOD_UNLOAD:
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nvme_unload();
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break;
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case MOD_SHUTDOWN:
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nvme_shutdown();
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break;
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default:
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break;
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}
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return (0);
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}
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void
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nvme_dump_command(struct nvme_command *cmd)
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{
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printf(
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"opc:%x f:%x r1:%x cid:%x nsid:%x r2:%x r3:%x mptr:%jx prp1:%jx prp2:%jx cdw:%x %x %x %x %x %x\n",
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cmd->opc, cmd->fuse, cmd->rsvd1, cmd->cid, cmd->nsid,
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cmd->rsvd2, cmd->rsvd3,
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(uintmax_t)cmd->mptr, (uintmax_t)cmd->prp1, (uintmax_t)cmd->prp2,
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cmd->cdw10, cmd->cdw11, cmd->cdw12, cmd->cdw13, cmd->cdw14,
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cmd->cdw15);
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}
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void
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nvme_dump_completion(struct nvme_completion *cpl)
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{
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printf("cdw0:%08x sqhd:%04x sqid:%04x "
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"cid:%04x p:%x sc:%02x sct:%x m:%x dnr:%x\n",
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cpl->cdw0, cpl->sqhd, cpl->sqid,
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cpl->cid, cpl->p, cpl->sf_sc, cpl->sf_sct, cpl->sf_m,
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cpl->sf_dnr);
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}
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void
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nvme_payload_map(void *arg, bus_dma_segment_t *seg, int nseg, int error)
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{
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struct nvme_tracker *tr = arg;
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uint32_t cur_nseg;
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KASSERT(error == 0, ("nvme_payload_map error != 0\n"));
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/*
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* Note that we specified PAGE_SIZE for alignment and max
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* segment size when creating the bus dma tags. So here
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* we can safely just transfer each segment to its
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* associated PRP entry.
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*/
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tr->req->cmd.prp1 = seg[0].ds_addr;
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if (nseg == 2) {
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tr->req->cmd.prp2 = seg[1].ds_addr;
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} else if (nseg > 2) {
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cur_nseg = 1;
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tr->req->cmd.prp2 = (uint64_t)tr->prp_bus_addr;
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while (cur_nseg < nseg) {
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tr->prp[cur_nseg-1] =
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(uint64_t)seg[cur_nseg].ds_addr;
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cur_nseg++;
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}
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}
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nvme_qpair_submit_tracker(tr->qpair, tr);
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}
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static int
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nvme_attach(device_t dev)
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{
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struct nvme_controller *ctrlr = DEVICE2SOFTC(dev);
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int status;
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status = nvme_ctrlr_construct(ctrlr, dev);
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if (status != 0)
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return (status);
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/*
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* Reset controller twice to ensure we do a transition from cc.en==1
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* to cc.en==0. This is because we don't really know what status
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* the controller was left in when boot handed off to OS.
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*/
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status = nvme_ctrlr_hw_reset(ctrlr);
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if (status != 0)
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return (status);
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status = nvme_ctrlr_hw_reset(ctrlr);
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if (status != 0)
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return (status);
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ctrlr->config_hook.ich_func = nvme_ctrlr_start;
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ctrlr->config_hook.ich_arg = ctrlr;
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config_intrhook_establish(&ctrlr->config_hook);
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return (0);
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}
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static int
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nvme_detach (device_t dev)
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{
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struct nvme_controller *ctrlr = DEVICE2SOFTC(dev);
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nvme_ctrlr_destruct(ctrlr, dev);
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return (0);
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}
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static void
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nvme_notify_consumer(struct nvme_consumer *cons)
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{
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device_t *devlist;
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struct nvme_controller *ctrlr;
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struct nvme_namespace *ns;
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void *ctrlr_cookie;
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int dev_idx, ns_idx, devcount;
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if (devclass_get_devices(nvme_devclass, &devlist, &devcount))
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return;
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for (dev_idx = 0; dev_idx < devcount; dev_idx++) {
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ctrlr = DEVICE2SOFTC(devlist[dev_idx]);
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if (cons->ctrlr_fn != NULL)
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ctrlr_cookie = (*cons->ctrlr_fn)(ctrlr);
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else
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ctrlr_cookie = NULL;
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ctrlr->cons_cookie[cons->id] = ctrlr_cookie;
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for (ns_idx = 0; ns_idx < ctrlr->cdata.nn; ns_idx++) {
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ns = &ctrlr->ns[ns_idx];
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if (cons->ns_fn != NULL)
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ns->cons_cookie[cons->id] =
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(*cons->ns_fn)(ns, ctrlr_cookie);
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}
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}
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free(devlist, M_TEMP);
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}
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void
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nvme_notify_async_consumers(struct nvme_controller *ctrlr,
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const struct nvme_completion *async_cpl)
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{
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struct nvme_consumer *cons;
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uint32_t i;
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for (i = 0; i < NVME_MAX_CONSUMERS; i++) {
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cons = &nvme_consumer[i];
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if (cons->id != INVALID_CONSUMER_ID && cons->async_fn != NULL)
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(*cons->async_fn)(ctrlr->cons_cookie[i], async_cpl);
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}
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}
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struct nvme_consumer *
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nvme_register_consumer(nvme_cons_ns_fn_t ns_fn, nvme_cons_ctrlr_fn_t ctrlr_fn,
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nvme_cons_async_fn_t async_fn)
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{
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int i;
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/*
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* TODO: add locking around consumer registration. Not an issue
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* right now since we only have one nvme consumer - nvd(4).
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*/
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for (i = 0; i < NVME_MAX_CONSUMERS; i++)
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if (nvme_consumer[i].id == INVALID_CONSUMER_ID) {
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nvme_consumer[i].id = i;
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nvme_consumer[i].ns_fn = ns_fn;
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nvme_consumer[i].ctrlr_fn = ctrlr_fn;
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nvme_consumer[i].async_fn = async_fn;
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nvme_notify_consumer(&nvme_consumer[i]);
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return (&nvme_consumer[i]);
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}
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printf("nvme(4): consumer not registered - no slots available\n");
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return (NULL);
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}
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void
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nvme_unregister_consumer(struct nvme_consumer *consumer)
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{
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consumer->id = INVALID_CONSUMER_ID;
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}
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