6acc49e3bd
to control the mapping of things like the ACPI and APM into memory. The problem is that starting X changes these values, so if something was using the bits of BIOS mapped into memory (say ACPI or APM), then next time they access this memory the machine would hang. This patch refuse to change MTRR values it doesn't understand, unless a new "force" option is given. This means X doesn't change them by accident but someone can override that if they really want to. PR: 28418 Tested by: Christopher Masto <chris@netmonger.net>, David Bushong <david@bushong.net>, Santos <casd@myrealbox.com> MFC after: 1 week
117 lines
3.3 KiB
Groff
117 lines
3.3 KiB
Groff
.\" Copyright (c) 1999 Chris Costello
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.\" All rights reserved.
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.\"
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.\" Redistribution and use in source and binary forms, with or without
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.\" modification, are permitted provided that the following conditions
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.\" are met:
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.\" 1. Redistributions of source code must retain the above copyright
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.\" notice, this list of conditions and the following disclaimer.
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.\" 2. Redistributions in binary form must reproduce the above copyright
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.\" notice, this list of conditions and the following disclaimer in the
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.\" documentation and/or other materials provided with the distribution.
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.\"
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.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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.\" SUCH DAMAGE.
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.\"
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.\" $FreeBSD$
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.\"
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.Dd September 28, 1999
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.Dt MEMCONTROL 8
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.Os
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.Sh NAME
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.Nm memcontrol
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.Nd "control system cache behaviour with respect to memory"
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.Sh SYNOPSIS
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.Nm
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.Ar list
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.Op Fl a
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.Pp
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.Nm
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.Ar set
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.Fl b Ar base
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.Fl l Ar length
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.Fl o Ar owner
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.Ar attribute
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.Pp
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.Nm
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.Ar clear
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.Fl o Ar owner
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.Pp
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.Nm
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.Ar clear
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.Fl b Ar base
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.Fl l Ar length
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.Sh DESCRIPTION
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A number of supported system architectures allow the behaviour of the CPU
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cache to be programmed to behave differently depending on the region being
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written.
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.Pp
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The
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.Nm
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utility
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provides an interface to this facility, allowing CPU cache behavior to
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be altered for ranges of system physical memory.
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.Pp
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These ranges are typically power-of-2 aligned and sized, however the specific
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rules governing their layout vary between architectures. The
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.Nm
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utility does not attempt to enforce these rules, however the system will
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reject any attempt to set an illegal combination.
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.Bl -tag -width clear
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.It Ar list
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List range slots.
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.Bl -tag -width xxxxxx
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.It Op Fl a
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List all range slots, even those that are inactive
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.El
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.It Ar set
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Set memory range attributes.
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.Bl -tag -width xxxxxx
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.It Fl b Ar base
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Memory range base address
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.It Fl l Ar length
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Length of memory range in bytes, power of 2
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.It Fl o Ar owner
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Text identifier for this setting (7 char max)
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.It Ar attribute
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Attributes applied to this range; combinations of
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.Ar force ,
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.Ar uncacheable ,
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.Ar write-combine ,
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.Ar write-through ,
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.Ar write-back ,
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.Ar write-protect
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.El
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.It Ar clear
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Clear memory range attributes.
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Ranges may be cleared by owner or by
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base/length combination.
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.Pp
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To clear based on ownership:
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.Bl -tag -width xxxxxx
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.It Fl o Ar owner
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All ranges with this owner will be cleared
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.El
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.Pp
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To clear based on the base/length combination:
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.Bl -tag -width xxxxxx
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.It Fl b Ar base
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Memory range base address
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.It Fl l Ar length
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Length of memory range in bytes, power of 2
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.El
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.Pp
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Base and length must exactly match an existing range.
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.El
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.Sh SEE ALSO
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.Xr mem 4
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