8ea6d154a2
PCI devices apparently was changed from a special deferred trap with TPC pointing to the membar #Sync following the failing load/store instruction to a precise trap with TPC pointing to the failing load/store instruction. Thus remove the check the check whether TPC points to a membar #Sync in case of a data access trap as it's off-by-one for USIII CPUs and it should be sufficient to check whether the trap happend while in fasword*() to properly detect traps caused by peeking/poking. This also corresponds to what other OSs do. Note that also only the USIIi manual suggests to check the TPC for such traps while the USII one doesn't (in the public USIII manual device peeking/poking isn't mentioned at all). |
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central | ||
compile | ||
conf | ||
creator | ||
ebus | ||
fhc | ||
include | ||
isa | ||
pci | ||
sbus | ||
sparc64 |