e4f8c28c9e
- Move esp_devclass to ncr53c9x.c in order to allow different bus front-ends to use it. - Use KOBJMETHOD_END. - Remove the gl_clear_latched_intr hook as it's not needed for any of the chips nor the front-ends supported in FreeBSD and likely never will be. - Correct the DMA constraints used in the SBus front-end, the LSI64854 isn't limited to 32-bit DMA. - The ESP200 also only supports up to 64k transfers. - Don't let the DMA and SBus front-end supply a maximum transfer size larger than MAXPHYS as that's the maximum the upper layers use and we otherwise just waste resources unnecessarily. - Initialize the ECB callout and don't zero the handle when returning ECBs to the free list so that ncr53c9x_callout() actually is called with the driver lock held. - On detach the driver lock should be held across cam_sim_free() according to isp(4) and a panic received. - Check the return value of NCRDMA_SETUP(), i.e. bus_dmamap_load(9), and try to handle failures gracefully. - In ncr53c9x_action() replace N calls to xpt_done() in a switch with just one at the end. - On XPT_PATH_INQ report "NCR" rather than "Sun" as the vendor as the former is somewhat more correct as well as the maximum supported transfer size via maxio in order to take advantage of controllers that that can handle more than DFLTPHYS. - Print the number of MESSAGE (EXTENDED) rejected. - Fix the path encoded in the multiple inclusion protection of ncr53c9xvar.h. - Correct the DMA constraints used in the LSI64854 core to not exceed the maximum supported transfer size and include the boundary so we don't need to check on every setup of a DMA transfer. - Let the bus DMA map callbacks do nothing in case of an error. - Correctly handle > 64k transfers for FAS366 in the LSI64854. A new feature flag NCR_F_LARGEXFER was introduced so we just need to check for this one and not for individual controllers supporting large transfers in several places. - Let the LSI64854 core load transfer buffers using BUS_DMA_NOWAIT as the NCR53C9x core can't handle EINPROGRESS. Due to lack of bounce buffers support, sparc64 doesn't actually use EINPROGRESS and likely never will, as an example for writing additional front-ends for the NCR53C9x core it makes sense to set BUS_DMA_NOWAIT anyway though. - Some minor cleanup.
95 lines
3.2 KiB
C
95 lines
3.2 KiB
C
/* $NetBSD: lsi64854var.h,v 1.12 2008/04/28 20:23:50 martin Exp $ */
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/*-
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* Copyright (c) 1998 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Paul Kranenburg.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/* $FreeBSD$ */
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struct lsi64854_softc {
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device_t sc_dev;
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struct resource *sc_res;
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u_int sc_rev; /* revision */
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int sc_burst; /* max suported burst size */
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int sc_channel;
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#define L64854_CHANNEL_SCSI 1
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#define L64854_CHANNEL_ENET 2
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#define L64854_CHANNEL_PP 3
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void *sc_client;
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int sc_active; /* DMA active? */
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bus_dmamap_t sc_dmamap; /* DMA map for bus_dma_* */
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bus_dma_tag_t sc_parent_dmat;
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bus_dma_tag_t sc_buffer_dmat;
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bus_size_t sc_maxdmasize;
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int sc_datain;
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size_t sc_dmasize;
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void **sc_dmaaddr;
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size_t *sc_dmalen;
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void (*reset)(struct lsi64854_softc *);/* reset routine */
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int (*setup)(struct lsi64854_softc *, void **, size_t *,
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int, size_t *); /* DMA setup */
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int (*intr)(void *); /* interrupt handler */
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u_int sc_dmactl;
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int sc_dodrain;
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};
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#define L64854_GCSR(sc) bus_read_4((sc)->sc_res, L64854_REG_CSR)
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#define L64854_SCSR(sc, csr) bus_write_4((sc)->sc_res, L64854_REG_CSR, csr)
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/*
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* DMA engine interface functions.
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*/
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#define DMA_RESET(sc) (((sc)->reset)(sc))
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#define DMA_INTR(sc) (((sc)->intr)(sc))
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#define DMA_SETUP(sc, a, l, d, s) (((sc)->setup)(sc, a, l, d, s))
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#define DMA_ISACTIVE(sc) ((sc)->sc_active)
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#define DMA_ENINTR(sc) do { \
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uint32_t csr = L64854_GCSR(sc); \
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csr |= L64854_INT_EN; \
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L64854_SCSR(sc, csr); \
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} while (/* CONSTCOND */0)
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#define DMA_ISINTR(sc) (L64854_GCSR(sc) & (D_INT_PEND|D_ERR_PEND))
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#define DMA_GO(sc) do { \
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uint32_t csr = L64854_GCSR(sc); \
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csr |= D_EN_DMA; \
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L64854_SCSR(sc, csr); \
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sc->sc_active = 1; \
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} while (/* CONSTCOND */0)
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int lsi64854_attach(struct lsi64854_softc *);
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int lsi64854_detach(struct lsi64854_softc *);
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