dc4ee6ca91
make use of it where possible. This primarily brings in support for newer hardware, and FreeBSD is not yet able to support the abundance of IRQs on new hardware and many features in the Ethernet driver. Because of the changes to IRQs in the Simple Executive, we have to maintain our own list of Octeon IRQs now, which probably can be pared-down and be specific to the CIU interrupt unit soon, and when other interrupt mechanisms are added they can maintain their own definitions. Remove unmasking of interrupts from within the UART device now that the function used is no longer present in the Simple Executive. The unmasking seems to have been gratuitous as this is more properly handled by the buses above the UART device, and seems to work on that basis.
204 lines
6.3 KiB
C
204 lines
6.3 KiB
C
/***********************license start***************
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* Copyright (c) 2003-2010 Cavium Inc. (support@cavium.com). All rights
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* reserved.
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided
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* with the distribution.
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* * Neither the name of Cavium Inc. nor the names of
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* its contributors may be used to endorse or promote products
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* derived from this software without specific prior written
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* permission.
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* This Software, including technical data, may be subject to U.S. export control
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* laws, including the U.S. Export Administration Act and its associated
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* regulations, and may be subject to export or import regulations in other
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* countries.
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* TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
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* AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS OR
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* WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO
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* THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR
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* DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM
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* SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE,
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* MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF
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* VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR
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* CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR
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* PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
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***********************license end**************************************/
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/**
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* @file
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*
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* Interface to the hardware Input Packet Data unit.
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*
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* <hr>$Revision: 70030 $<hr>
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*/
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#ifndef __CVMX_IPD_H__
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#define __CVMX_IPD_H__
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#ifdef CVMX_BUILD_FOR_LINUX_KERNEL
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#include <asm/octeon/cvmx.h>
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#include <asm/octeon/cvmx-config.h>
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#include <asm/octeon/cvmx-ipd-defs.h>
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#else
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# ifndef CVMX_DONT_INCLUDE_CONFIG
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# include "executive-config.h"
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# ifdef CVMX_ENABLE_PKO_FUNCTIONS
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# include "cvmx-config.h"
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# endif
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# endif
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#endif
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifndef CVMX_ENABLE_LEN_M8_FIX
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#define CVMX_ENABLE_LEN_M8_FIX 0
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#endif
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/* CSR typedefs have been moved to cvmx-ipd-defs.h */
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typedef cvmx_ipd_1st_mbuff_skip_t cvmx_ipd_mbuff_not_first_skip_t;
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typedef cvmx_ipd_1st_next_ptr_back_t cvmx_ipd_second_next_ptr_back_t;
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/**
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* Configure IPD
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*
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* @param mbuff_size Packets buffer size in 8 byte words
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* @param first_mbuff_skip
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* Number of 8 byte words to skip in the first buffer
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* @param not_first_mbuff_skip
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* Number of 8 byte words to skip in each following buffer
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* @param first_back Must be same as first_mbuff_skip / 128
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* @param second_back
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* Must be same as not_first_mbuff_skip / 128
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* @param wqe_fpa_pool
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* FPA pool to get work entries from
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* @param cache_mode
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* @param back_pres_enable_flag
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* Enable or disable port back pressure at a global level.
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* This should always be 1 as more accurate control can be
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* found in IPD_PORTX_BP_PAGE_CNT[BP_ENB].
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*/
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static inline void cvmx_ipd_config(uint64_t mbuff_size,
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uint64_t first_mbuff_skip,
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uint64_t not_first_mbuff_skip,
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uint64_t first_back,
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uint64_t second_back,
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uint64_t wqe_fpa_pool,
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cvmx_ipd_mode_t cache_mode,
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uint64_t back_pres_enable_flag
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)
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{
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cvmx_ipd_1st_mbuff_skip_t first_skip;
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cvmx_ipd_mbuff_not_first_skip_t not_first_skip;
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cvmx_ipd_packet_mbuff_size_t size;
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cvmx_ipd_1st_next_ptr_back_t first_back_struct;
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cvmx_ipd_second_next_ptr_back_t second_back_struct;
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cvmx_ipd_wqe_fpa_queue_t wqe_pool;
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cvmx_ipd_ctl_status_t ipd_ctl_reg;
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first_skip.u64 = 0;
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first_skip.s.skip_sz = first_mbuff_skip;
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cvmx_write_csr(CVMX_IPD_1ST_MBUFF_SKIP, first_skip.u64);
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not_first_skip.u64 = 0;
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not_first_skip.s.skip_sz = not_first_mbuff_skip;
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cvmx_write_csr(CVMX_IPD_NOT_1ST_MBUFF_SKIP, not_first_skip.u64);
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size.u64 = 0;
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size.s.mb_size = mbuff_size;
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cvmx_write_csr(CVMX_IPD_PACKET_MBUFF_SIZE, size.u64);
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first_back_struct.u64 = 0;
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first_back_struct.s.back = first_back;
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cvmx_write_csr(CVMX_IPD_1st_NEXT_PTR_BACK, first_back_struct.u64);
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second_back_struct.u64 = 0;
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second_back_struct.s.back = second_back;
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cvmx_write_csr(CVMX_IPD_2nd_NEXT_PTR_BACK,second_back_struct.u64);
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wqe_pool.u64 = 0;
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wqe_pool.s.wqe_pool = wqe_fpa_pool;
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cvmx_write_csr(CVMX_IPD_WQE_FPA_QUEUE, wqe_pool.u64);
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ipd_ctl_reg.u64 = cvmx_read_csr(CVMX_IPD_CTL_STATUS);
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ipd_ctl_reg.s.opc_mode = cache_mode;
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ipd_ctl_reg.s.pbp_en = back_pres_enable_flag;
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cvmx_write_csr(CVMX_IPD_CTL_STATUS, ipd_ctl_reg.u64);
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/* Note: the example RED code that used to be here has been moved to
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cvmx_helper_setup_red */
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}
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/**
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* Enable IPD
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*/
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static inline void cvmx_ipd_enable(void)
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{
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cvmx_ipd_ctl_status_t ipd_reg;
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ipd_reg.u64 = cvmx_read_csr(CVMX_IPD_CTL_STATUS);
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/*
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* busy-waiting for rst_done in o68
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*/
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if (OCTEON_IS_MODEL(OCTEON_CN68XX))
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while(ipd_reg.s.rst_done != 0)
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ipd_reg.u64 = cvmx_read_csr(CVMX_IPD_CTL_STATUS);
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if (ipd_reg.s.ipd_en)
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cvmx_dprintf("Warning: Enabling IPD when IPD already enabled.\n");
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ipd_reg.s.ipd_en = 1;
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#if CVMX_ENABLE_LEN_M8_FIX
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if(!OCTEON_IS_MODEL(OCTEON_CN38XX_PASS2))
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ipd_reg.s.len_m8 = 1;
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#endif
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cvmx_write_csr(CVMX_IPD_CTL_STATUS, ipd_reg.u64);
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}
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/**
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* Disable IPD
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*/
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static inline void cvmx_ipd_disable(void)
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{
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cvmx_ipd_ctl_status_t ipd_reg;
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ipd_reg.u64 = cvmx_read_csr(CVMX_IPD_CTL_STATUS);
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ipd_reg.s.ipd_en = 0;
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cvmx_write_csr(CVMX_IPD_CTL_STATUS, ipd_reg.u64);
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}
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extern void __cvmx_ipd_free_ptr(void);
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#ifdef __cplusplus
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}
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#endif
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#endif /* __CVMX_IPD_H__ */
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