31eddd58e3
Most part is merged from amd64. - i386/acpica/acpi_wakecode.S Replaced with amd64 code (from realmode to paging enabling code). - i386/acpica/acpi_wakeup.c Replaced with amd64 code (except for wakeup_pagetables stuff). - i386/include/pcb.h - i386/i386/genassym.c Added PCB new members (CR0, CR2, CR4, DS, ED, FS, SS, GDT, IDT, LDT and TR) needed for suspend/resume, not for context switch. - i386/i386/swtch.s Added suspendctx() and resumectx(). Note that savectx() was not changed and used for suspending (while amd64 code uses it). BSP and AP execute the same sequence, suspendctx(), acpi_wakecode() and resumectx() for suspend/resume (in case of UP system also). - i386/i386/apic_vector.s Added cpususpend(). - i386/i386/mp_machdep.c - i386/include/smp.h Added cpususpend_handler(). - i386/include/apicvar.h - kern/subr_smp.c - sys/smp.h Added IPI_SUSPEND and suspend_cpus(). - i386/i386/initcpu.c - i386/i386/machdep.c - i386/include/md_var.h - pc98/pc98/machdep.c Moved initializecpu() declarations to md_var.h. MFC after: 3 days
206 lines
5.5 KiB
ArmAsm
206 lines
5.5 KiB
ArmAsm
/*-
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* Copyright (c) 2001 Takanori Watanabe <takawata@jp.freebsd.org>
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* Copyright (c) 2001-2012 Mitsuru IWASAKI <iwasaki@jp.freebsd.org>
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* Copyright (c) 2003 Peter Wemm
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* Copyright (c) 2008-2012 Jung-uk Kim <jkim@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <machine/asmacros.h>
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#include <machine/ppireg.h>
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#include <machine/specialreg.h>
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#include <machine/timerreg.h>
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#include "assym.s"
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/*
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* Resume entry point. The BIOS enters here in real mode after POST with
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* CS set to the page where we stored this code. It should configure the
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* segment registers with a flat 4 GB address space and EFLAGS.IF = 0.
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* Depending on the previous sleep state, we may need to initialize more
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* of the system (i.e., S3 suspend-to-RAM vs. S4 suspend-to-disk).
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*/
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.data /* So we can modify it */
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ALIGN_TEXT
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.code16
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wakeup_start:
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/*
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* Set up segment registers for real mode, a small stack for
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* any calls we make, and clear any flags.
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*/
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cli /* make sure no interrupts */
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mov %cs, %ax /* copy %cs to %ds. Remember these */
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mov %ax, %ds /* are offsets rather than selectors */
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mov %ax, %ss
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movw $PAGE_SIZE, %sp
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xorw %ax, %ax
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pushw %ax
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popfw
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/* To debug resume hangs, beep the speaker if the user requested. */
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testb $~0, resume_beep - wakeup_start
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jz 1f
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movb $0, resume_beep - wakeup_start
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/* Set PIC timer2 to beep. */
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movb $(TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT), %al
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outb %al, $TIMER_MODE
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/* Turn on speaker. */
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inb $IO_PPI, %al
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orb $PIT_SPKR, %al
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outb %al, $IO_PPI
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/* Set frequency. */
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movw $0x4c0, %ax
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outb %al, $TIMER_CNTR2
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shrw $8, %ax
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outb %al, $TIMER_CNTR2
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1:
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/* Re-initialize video BIOS if the reset_video tunable is set. */
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testb $~0, reset_video - wakeup_start
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jz 1f
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movb $0, reset_video - wakeup_start
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lcall $0xc000, $3
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/* When we reach here, int 0x10 should be ready. Hide cursor. */
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movb $0x01, %ah
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movb $0x20, %ch
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int $0x10
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/* Re-start in case the previous BIOS call clobbers them. */
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jmp wakeup_start
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1:
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/*
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* Find relocation base and patch the gdt descript and ljmp targets
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*/
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xorl %ebx, %ebx
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mov %cs, %bx
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sall $4, %ebx /* %ebx is now our relocation base */
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/*
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* Load the descriptor table pointer. We'll need it when running
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* in 16-bit protected mode.
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*/
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lgdtl bootgdtdesc - wakeup_start
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/* Enable protected mode */
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movl $CR0_PE, %eax
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mov %eax, %cr0
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/*
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* Now execute a far jump to turn on protected mode. This
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* causes the segment registers to turn into selectors and causes
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* %cs to be loaded from the gdt.
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*
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* The following instruction is:
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* ljmpl $bootcode32 - bootgdt, $wakeup_32 - wakeup_start
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* but gas cannot assemble that. And besides, we patch the targets
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* in early startup and its a little clearer what we are patching.
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*/
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wakeup_sw32:
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.byte 0x66 /* size override to 32 bits */
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.byte 0xea /* opcode for far jump */
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.long wakeup_32 - wakeup_start /* offset in segment */
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.word bootcode32 - bootgdt /* index in gdt for 32 bit code */
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/*
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* At this point, we are running in 32 bit legacy protected mode.
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*/
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ALIGN_TEXT
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.code32
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wakeup_32:
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mov $bootdata32 - bootgdt, %eax
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mov %ax, %ds
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/* Get PCB and return address. */
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movl wakeup_pcb - wakeup_start(%ebx), %esi
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movl wakeup_ret - wakeup_start(%ebx), %edi
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/* Restore CR4 and CR3. */
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movl wakeup_cr4 - wakeup_start(%ebx), %eax
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mov %eax, %cr4
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movl wakeup_cr3 - wakeup_start(%ebx), %eax
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mov %eax, %cr3
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/*
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* Finally, switch to long bit mode by enabling paging. We have
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* to be very careful here because all the segmentation disappears
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* out from underneath us. The spec says we can depend on the
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* subsequent pipelined branch to execute, but *only if* everthing
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* is still identity mapped. If any mappings change, the pipeline
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* will flush.
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*/
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mov %cr0, %eax
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orl $CR0_PG, %eax
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mov %eax, %cr0
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jmp 1f
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1:
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/* Jump to return address. */
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jmp *%edi
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.data
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resume_beep:
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.byte 0
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reset_video:
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.byte 0
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ALIGN_DATA
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bootgdt:
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.long 0x00000000
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.long 0x00000000
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bootcode32:
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.long 0x0000ffff
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.long 0x00cf9b00
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bootdata32:
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.long 0x0000ffff
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.long 0x00cf9300
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bootgdtend:
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bootgdtdesc:
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.word bootgdtend - bootgdt /* Length */
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.long bootgdt - wakeup_start /* Offset plus %ds << 4 */
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ALIGN_DATA
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wakeup_cr4:
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.long 0
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wakeup_cr3:
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.long 0
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wakeup_pcb:
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.long 0
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wakeup_ret:
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.long 0
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dummy:
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