John Baldwin 87ca48b6b8 Revert part of rev 1.230 and assume that all EISA IRQs use active high ... polarity rather than assuming that level triggered IRQs use active low and edge triggered IRQs use active high. Both the MultiProcessor 1.4 and ACPI 2.0 Specifications state in their examples that level triggered EISA IRQs are active low, but in practice they seem to be active high. Reported by: Nik Azim Azam nskyline_r35 at yahoo dot com		2004-05-24 15:51:46 +00:00
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acpica	Fixup a few bogons in a comment.	2004-05-11 20:06:32 +00:00
bios
compile
conf	Add Cronyx Tau-PCI sync WAN adapters family entry.	2004-05-17 14:42:59 +00:00
cpufreq
i386	Revert part of rev 1.230 and assume that all EISA IRQs use active high	2004-05-24 15:51:46 +00:00
ibcs2	Regen from ibcs2_wait() becoming MPSAFE.	2004-03-28 22:51:40 +00:00
include	Moved i386 asms to an i386 header. The asms are for calibration of	2004-05-20 16:12:19 +00:00
isa	MFamd64 (put TF_EIP in assym.s and use it instead of a magic offset in	2004-05-23 16:50:55 +00:00
linux
pci	- Create a pir0 psuedo device as a child of legacy0 if we attach a legacy	2004-05-04 21:17:52 +00:00
svr4
Makefile