80a79189ef
Make sure both sides of the DMA buffer memory accesses for the CORB and RIRB (control buffers) in snd_hda (device and CPU) can see coherent memory. This is needed on weakly ordered architectures including PowerPC and ARM. Patch originally by mmel, with small changes. This does not cover the data path of snd_hda. We don't have sync operations for in-progress DMA buffers, to sync ranges of a map. Reviewed By: mmel Differential Revision: https://reviews.freebsd.org/D16517 |
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|---|---|---|
| .. | ||
| hda | ||
| allegro_code.h | ||
| allegro_reg.h | ||
| als4000.c | ||
| als4000.h | ||
| atiixp.c | ||
| atiixp.h | ||
| aureal.c | ||
| aureal.h | ||
| cmi.c | ||
| cmireg.h | ||
| cs461x_dsp.h | ||
| cs4281.c | ||
| cs4281.h | ||
| csa.c | ||
| csapcm.c | ||
| csareg.h | ||
| csavar.h | ||
| ds1-fw.h | ||
| ds1.c | ||
| ds1.h | ||
| emu10k1.c | ||
| emu10kx-midi.c | ||
| emu10kx-pcm.c | ||
| emu10kx.c | ||
| emu10kx.h | ||
| emuxkireg.h | ||
| envy24.c | ||
| envy24.h | ||
| envy24ht.c | ||
| envy24ht.h | ||
| es137x.c | ||
| es137x.h | ||
| fm801.c | ||
| hdspe-pcm.c | ||
| hdspe.c | ||
| hdspe.h | ||
| ich.c | ||
| ich.h | ||
| maestro3.c | ||
| maestro_reg.h | ||
| maestro.c | ||
| neomagic-coeff.h | ||
| neomagic.c | ||
| neomagic.h | ||
| solo.c | ||
| spicds.c | ||
| spicds.h | ||
| t4dwave.c | ||
| t4dwave.h | ||
| via82c686.c | ||
| via82c686.h | ||
| via8233.c | ||
| via8233.h | ||
| vibes.c | ||
| vibes.h | ||