56248d9da8
make use of it where possible. This primarily brings in support for newer hardware, and FreeBSD is not yet able to support the abundance of IRQs on new hardware and many features in the Ethernet driver. Because of the changes to IRQs in the Simple Executive, we have to maintain our own list of Octeon IRQs now, which probably can be pared-down and be specific to the CIU interrupt unit soon, and when other interrupt mechanisms are added they can maintain their own definitions. Remove unmasking of interrupts from within the UART device now that the function used is no longer present in the Simple Executive. The unmasking seems to have been gratuitous as this is more properly handled by the buses above the UART device, and seems to work on that basis.
334 lines
12 KiB
C
334 lines
12 KiB
C
/***********************license start***************
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* Copyright (c) 2003-2010 Cavium Inc. (support@cavium.com). All rights
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* reserved.
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided
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* with the distribution.
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* * Neither the name of Cavium Inc. nor the names of
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* its contributors may be used to endorse or promote products
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* derived from this software without specific prior written
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* permission.
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* This Software, including technical data, may be subject to U.S. export control
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* laws, including the U.S. Export Administration Act and its associated
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* regulations, and may be subject to export or import regulations in other
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* countries.
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* TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
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* AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS OR
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* WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO
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* THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR
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* DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM
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* SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE,
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* MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF
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* VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR
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* CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR
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* PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
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***********************license end**************************************/
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/**
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* @file
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*
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* Interface to the hardware work queue timers.
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*
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`* <hr>$Revision: 70030 $<hr>
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*/
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#ifndef __CVMX_TIM_H__
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#define __CVMX_TIM_H__
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#include "cvmx-clock.h"
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#include "cvmx-fpa.h"
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#include "cvmx-wqe.h"
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#include "executive-config.h"
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#ifdef CVMX_ENABLE_TIMER_FUNCTIONS
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#include "cvmx-config.h"
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#endif
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define CVMX_TIM_NUM_TIMERS (OCTEON_IS_MODEL(OCTEON_CN68XX) ? 64 : 16)
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#define CVMX_TIM_NUM_BUCKETS 2048
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typedef enum
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{
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CVMX_TIM_STATUS_SUCCESS = 0,
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CVMX_TIM_STATUS_NO_MEMORY = -1,
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CVMX_TIM_STATUS_TOO_FAR_AWAY = -2,
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CVMX_TIM_STATUS_BUSY = -3
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} cvmx_tim_status_t;
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/**
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* Each timer bucket contains a list of work queue entries to
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* schedule when the timer fires. The list is implemented as
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* a linked list of blocks. Each block contains an array of
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* work queue entries followed by a next block pointer. Since
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* these blocks are dynamically allocated off of a hardware
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* memory pool, there actual size isn't known compile time.
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* The next block pointer is stored in the last 8 bytes of
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* the memory block.
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*/
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typedef struct cvmx_tim_entry_chunk
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{
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volatile uint64_t entries[0];
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} cvmx_tim_entry_chunk_t;
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/**
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* Each timer contains an array of buckets. Each bucket
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* represents the list of work queue entries that should be
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* scheduled when the timer fires. The first 3 entries are used
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* byt the hardware.
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*/
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typedef struct
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{
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volatile uint64_t first_chunk_addr;
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volatile uint32_t num_entries; /**< Zeroed by HW after traversing list */
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volatile uint32_t chunk_remainder;/**< Zeroed by HW after traversing list */
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// the remaining 16 bytes are not touched by hardware
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volatile cvmx_tim_entry_chunk_t *last_chunk;
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uint64_t pad;
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} cvmx_tim_bucket_entry_t;
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/**
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* Structure representing an individual timer. Each timer has
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* a timer period, a memory management pool, and a list of
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* buckets.
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*/
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typedef struct
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{
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cvmx_tim_bucket_entry_t*bucket; /**< The timer buckets. Array of [CVMX_TIM_NUM_TIMERS][CVMX_TIM_NUM_BUCKETS] */
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uint64_t tick_cycles; /**< How long a bucket represents */
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uint64_t start_time; /**< Time the timer started in cycles */
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uint32_t bucket_shift; /**< How long a bucket represents in ms */
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uint32_t num_buckets; /**< How many buckets per wheel */
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uint32_t max_ticks; /**< maximum number of ticks allowed for timer */
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} cvmx_tim_t;
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/**
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* Structure used to store state information needed to delete
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* an already scheduled timer entry. An instance of this
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* structure must be passed to cvmx_tim_add_entry in order
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* to be able to delete an entry later with
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* cvmx_tim_delete_entry.
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*
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* NOTE: This structure should be considered opaque by the application,
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* and the application should not access its members
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*/
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typedef struct
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{
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uint64_t commit_cycles; /**< After this time the timer can't be changed */
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uint64_t * timer_entry_ptr;/**< Where the work entry is. Zero this
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location to delete the entry */
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} cvmx_tim_delete_t;
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/**
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* Global structure holding the state of all timers.
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*/
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extern cvmx_tim_t cvmx_tim;
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#ifdef CVMX_ENABLE_TIMER_FUNCTIONS
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/**
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* Setup a timer for use. Must be called before the timer
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* can be used.
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*
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* @param tick Time between each bucket in microseconds. This must not be
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* smaller than 1024/(clock frequency in MHz).
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* @param max_ticks The maximum number of ticks the timer must be able
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* to schedule in the future. There are guaranteed to be enough
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* timer buckets such that:
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* number of buckets >= max_ticks.
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* @return Zero on success. Negative on error. Failures are possible
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* if the number of buckets needed is too large or memory
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* allocation fails for creating the buckets.
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*/
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int cvmx_tim_setup(uint64_t tick, uint64_t max_ticks);
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#endif
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/**
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* Start the hardware timer processing
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*/
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extern void cvmx_tim_start(void);
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/**
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* Stop the hardware timer processing. Timers stay configured.
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*/
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extern void cvmx_tim_stop(void);
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/**
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* Stop the timer. After this the timer must be setup again
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* before use.
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*/
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#ifdef CVMX_ENABLE_TIMER_FUNCTIONS
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extern void cvmx_tim_shutdown(void);
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#endif
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#ifdef CVMX_ENABLE_TIMER_FUNCTIONS
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/**
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* Add a work queue entry to the timer.
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*
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* @param work_entry Work queue entry to add.
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* @param ticks_from_now
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* @param delete_info
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* Optional pointer where to store information needed to
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* delete the timer entry. If non NULL information needed
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* to delete the timer entry before it fires is stored here.
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* If you don't need to be able to delete the timer, pass
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* NULL.
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* @return Result return code
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*/
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static inline cvmx_tim_status_t cvmx_tim_add_entry(cvmx_wqe_t *work_entry, uint64_t ticks_from_now, cvmx_tim_delete_t *delete_info)
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{
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cvmx_tim_bucket_entry_t* work_bucket_ptr;
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uint64_t work_bucket;
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volatile uint64_t * tim_entry_ptr; /* pointer to wqe address in timer chunk */
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uint64_t entries_per_chunk;
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const uint64_t cycles = cvmx_clock_get_count(CVMX_CLOCK_TIM); /* Get our reference time early for accuracy */
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const uint64_t core_num = cvmx_get_core_num(); /* One timer per processor, so use this to select */
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/* Make sure the specified time won't wrap our bucket list */
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if (ticks_from_now > cvmx_tim.max_ticks)
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{
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cvmx_dprintf("cvmx_tim_add_entry: Tried to schedule work too far away.\n");
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return CVMX_TIM_STATUS_TOO_FAR_AWAY;
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}
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/* Since we have no way to synchronize, we can't update a timer that is
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being used by the hardware. Two buckets forward should be safe */
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if (ticks_from_now < 2)
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{
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cvmx_dprintf("cvmx_tim_add_entry: Tried to schedule work too soon. Delaying it.\n");
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ticks_from_now = 2;
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}
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/* Get the bucket this work queue entry should be in. Remember the bucket
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array is circular */
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work_bucket = (((ticks_from_now * cvmx_tim.tick_cycles) + cycles - cvmx_tim.start_time)
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>> cvmx_tim.bucket_shift);
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work_bucket_ptr = cvmx_tim.bucket + core_num * cvmx_tim.num_buckets + (work_bucket & (cvmx_tim.num_buckets - 1));
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entries_per_chunk = (CVMX_FPA_TIMER_POOL_SIZE/8 - 1);
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/* Check if we have room to add this entry into the existing list */
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if (work_bucket_ptr->chunk_remainder)
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{
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/* Adding the work entry to the end of the existing list */
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tim_entry_ptr = &(work_bucket_ptr->last_chunk->entries[entries_per_chunk - work_bucket_ptr->chunk_remainder]);
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*tim_entry_ptr = cvmx_ptr_to_phys(work_entry);
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work_bucket_ptr->chunk_remainder--;
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work_bucket_ptr->num_entries++;
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}
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else
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{
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/* Current list is either completely empty or completely full. We need
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to allocate a new chunk for storing this work entry */
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cvmx_tim_entry_chunk_t *new_chunk = (cvmx_tim_entry_chunk_t *)cvmx_fpa_alloc(CVMX_FPA_TIMER_POOL);
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if (new_chunk == NULL)
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{
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cvmx_dprintf("cvmx_tim_add_entry: Failed to allocate memory for new chunk.\n");
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return CVMX_TIM_STATUS_NO_MEMORY;
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}
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/* Does a chunk currently exist? We have to check num_entries since
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the hardware doesn't NULL out the chunk pointers on free */
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if (work_bucket_ptr->num_entries)
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{
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/* This chunk must be appended to an existing list by putting
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** its address in the last spot of the existing chunk. */
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work_bucket_ptr->last_chunk->entries[entries_per_chunk] = cvmx_ptr_to_phys(new_chunk);
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work_bucket_ptr->num_entries++;
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}
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else
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{
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/* This is the very first chunk. Add it */
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work_bucket_ptr->first_chunk_addr = cvmx_ptr_to_phys(new_chunk);
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work_bucket_ptr->num_entries = 1;
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}
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work_bucket_ptr->last_chunk = new_chunk;
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work_bucket_ptr->chunk_remainder = entries_per_chunk - 1;
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tim_entry_ptr = &(new_chunk->entries[0]);
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*tim_entry_ptr = cvmx_ptr_to_phys(work_entry);
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}
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/* If the user supplied a delete info structure then fill it in */
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if (delete_info)
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{
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/* It would be very bad to delete a timer entry after, or during the
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timer's processing. During the processing could yield unpredicatable
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results, but after would always be bad. Modifying the entry after
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processing means we would be changing data in a buffer that has been
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freed, and possible allocated again. For this reason we store a
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commit cycle count in the delete structure. If we are after this
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count we will refuse to delete the timer entry. */
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delete_info->commit_cycles = cycles + (ticks_from_now - 2) * cvmx_tim.tick_cycles;
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delete_info->timer_entry_ptr = (uint64_t *)tim_entry_ptr; /* Cast to non-volatile type */
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}
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CVMX_SYNCWS; /* Make sure the hardware timer unit can access valid data from L2 */
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return CVMX_TIM_STATUS_SUCCESS;
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}
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#endif
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/**
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* Delete a timer entry scheduled using cvmx_tim_add_entry.
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* Deleting a timer will fail if it has already triggered or
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* might be in progress. The actual state of the work queue
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* entry isn't changed. You need to dispose of it properly.
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*
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* @param delete_info
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* Structure passed to cvmx_tim_add_entry to store the
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* information needed to delete a timer entry.
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* @return CVMX_TIM_STATUS_BUSY if the timer was not deleted, otherwise
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* CVMX_TIM_STATUS_SUCCESS.
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*/
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static inline cvmx_tim_status_t cvmx_tim_delete_entry(cvmx_tim_delete_t *delete_info)
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{
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const uint64_t cycles = cvmx_clock_get_count(CVMX_CLOCK_TIM);
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if ((int64_t)(cycles - delete_info->commit_cycles) < 0)
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{
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/* Timer is far enough away. Safe to delete */
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*delete_info->timer_entry_ptr = 0;
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return CVMX_TIM_STATUS_SUCCESS;
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}
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else
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{
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/* Timer is passed the commit time. It cannot be stopped */
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return CVMX_TIM_STATUS_BUSY;
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}
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}
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#ifdef __cplusplus
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}
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#endif
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#endif // __CVMX_TIM_H__
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