8cb5f6fec8
and pc_pmap for SMP. This is key to allowing adding support for SCHED_ULE. Thanks go to Peter Jeremy for additional testing. - Add support for SCHED_ULE to cpu_switch(). Committed from: 201110DevSummit
225 lines
5.5 KiB
C
225 lines
5.5 KiB
C
/*-
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* Copyright (c) 2001 Jake Burkholder.
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* Copyright (c) 2011 Marius Strobl <marius@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _MACHINE_ASMACROS_H_
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#define _MACHINE_ASMACROS_H_
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#ifdef _KERNEL
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/*
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* Normal and alternate %g6 point to the pcb of the current process. Normal,
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* alternate and interrupt %g7 point to per-cpu data.
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*/
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#define PCB_REG %g6
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#define PCPU_REG %g7
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/*
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* Alternate %g5 points to a per-cpu panic stack, which is used as a last
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* resort, and for temporarily saving alternate globals.
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*/
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#define ASP_REG %g5
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#ifdef LOCORE
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/*
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* Atomically decrement an integer in memory.
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*/
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#define ATOMIC_DEC_INT(r1, r2, r3) \
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lduw [r1], r2 ; \
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9: sub r2, 1, r3 ; \
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casa [r1] ASI_N, r2, r3 ; \
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cmp r2, r3 ; \
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bne,pn %icc, 9b ; \
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mov r3, r2
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/*
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* Atomically increment an integer in memory.
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*/
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#define ATOMIC_INC_INT(r1, r2, r3) \
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lduw [r1], r2 ; \
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9: add r2, 1, r3 ; \
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casa [r1] ASI_N, r2, r3 ; \
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cmp r2, r3 ; \
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bne,pn %icc, 9b ; \
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mov r3, r2
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/*
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* Atomically increment a long in memory.
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*/
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#define ATOMIC_INC_LONG(r1, r2, r3) \
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ldx [r1], r2 ; \
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9: add r2, 1, r3 ; \
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casxa [r1] ASI_N, r2, r3 ; \
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cmp r2, r3 ; \
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bne,pn %xcc, 9b ; \
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mov r3, r2
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/*
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* Atomically clear a number of bits of an integer in memory.
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*/
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#define ATOMIC_CLEAR_INT(r1, r2, r3, bits) \
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lduw [r1], r2 ; \
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9: andn r2, bits, r3 ; \
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casa [r1] ASI_N, r2, r3 ; \
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cmp r2, r3 ; \
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bne,pn %icc, 9b ; \
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mov r3, r2
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/*
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* Atomically clear a number of bits of a long in memory.
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*/
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#define ATOMIC_CLEAR_LONG(r1, r2, r3, bits) \
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ldx [r1], r2 ; \
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9: andn r2, bits, r3 ; \
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casxa [r1] ASI_N, r2, r3 ; \
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cmp r2, r3 ; \
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bne,pn %xcc, 9b ; \
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mov r3, r2
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/*
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* Atomically load an integer from memory.
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*/
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#define ATOMIC_LOAD_INT(r1, val) \
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clr val ; \
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casa [r1] ASI_N, %g0, val
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/*
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* Atomically load a long from memory.
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*/
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#define ATOMIC_LOAD_LONG(r1, val) \
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clr val ; \
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casxa [r1] ASI_N, %g0, val
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/*
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* Atomically set a number of bits of an integer in memory.
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*/
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#define ATOMIC_SET_INT(r1, r2, r3, bits) \
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lduw [r1], r2 ; \
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9: or r2, bits, r3 ; \
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casa [r1] ASI_N, r2, r3 ; \
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cmp r2, r3 ; \
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bne,pn %icc, 9b ; \
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mov r3, r2
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/*
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* Atomically set a number of bits of a long in memory.
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*/
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#define ATOMIC_SET_LONG(r1, r2, r3, bits) \
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ldx [r1], r2 ; \
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9: or r2, bits, r3 ; \
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casxa [r1] ASI_N, r2, r3 ; \
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cmp r2, r3 ; \
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bne,pn %xcc, 9b ; \
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mov r3, r2
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/*
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* Atomically store an integer in memory.
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*/
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#define ATOMIC_STORE_INT(r1, r2, r3, val) \
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lduw [r1], r2 ; \
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9: mov val, r3 ; \
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casa [r1] ASI_N, r2, r3 ; \
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cmp r2, r3 ; \
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bne,pn %icc, 9b ; \
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mov r3, r2
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/*
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* Atomically store a long in memory.
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*/
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#define ATOMIC_STORE_LONG(r1, r2, r3, val) \
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ldx [r1], r2 ; \
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9: mov val, r3 ; \
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casxa [r1] ASI_N, r2, r3 ; \
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cmp r2, r3 ; \
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bne,pn %xcc, 9b ; \
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mov r3, r2
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#define PCPU(member) PCPU_REG + PC_ ## member
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#define PCPU_ADDR(member, reg) \
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add PCPU_REG, PC_ ## member, reg
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#define DEBUGGER() \
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ta %xcc, 1
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#define PANIC(msg, r1) \
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.sect .rodata ; \
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9: .asciz msg ; \
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.previous ; \
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SET(9b, r1, %o0) ; \
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call panic ; \
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nop
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#ifdef INVARIANTS
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#define KASSERT(r1, msg) \
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brnz,pt r1, 8f ; \
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nop ; \
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PANIC(msg, r1) ; \
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8:
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#else
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#define KASSERT(r1, msg)
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#endif
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#define PUTS(msg, r1) \
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.sect .rodata ; \
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9: .asciz msg ; \
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.previous ; \
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SET(9b, r1, %o0) ; \
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call printf ; \
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nop
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#define _ALIGN_DATA .align 8
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#define DATA(name) \
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.data ; \
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_ALIGN_DATA ; \
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.globl name ; \
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.type name, @object ; \
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name:
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#define EMPTY
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/*
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* Generate atomic compare and swap, load and store instructions for the
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* corresponding width and ASI (or not). Note that we want to evaluate the
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* macro args before concatenating, so that EMPTY really turns into nothing.
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*/
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#define _LD(w, a) ld ## w ## a
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#define _ST(w, a) st ## w ## a
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#define _CAS(w, a) cas ## w ## a
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#define LD(w, a) _LD(w, a)
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#define ST(w, a) _ST(w, a)
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#define CAS(w, a) _CAS(w, a)
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#endif /* LOCORE */
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#endif /* _KERNEL */
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#endif /* !_MACHINE_ASMACROS_H_ */
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