504 lines
14 KiB
C
504 lines
14 KiB
C
/*
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* Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
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* Copyright (c) 2002-2008 Atheros Communications, Inc.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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* $FreeBSD$
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*/
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#include "opt_ah.h"
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#include "ah.h"
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#include "ah_internal.h"
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#include "ah_devid.h"
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#ifdef AH_DEBUG
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#include "ah_desc.h" /* NB: for HAL_PHYERR* */
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#endif
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#include "ar5416/ar5416.h"
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#include "ar5416/ar5416reg.h"
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#include "ar5416/ar5416phy.h"
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/*
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* Return the wireless modes (a,b,g,n,t) supported by hardware.
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*
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* This value is what is actually supported by the hardware
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* and is unaffected by regulatory/country code settings.
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*
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*/
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u_int
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ar5416GetWirelessModes(struct ath_hal *ah)
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{
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u_int mode;
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struct ath_hal_private *ahpriv = AH_PRIVATE(ah);
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HAL_CAPABILITIES *pCap = &ahpriv->ah_caps;
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mode = ar5212GetWirelessModes(ah);
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/* Only enable HT modes if the NIC supports HT */
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if (pCap->halHTSupport == AH_TRUE && (mode & HAL_MODE_11A))
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mode |= HAL_MODE_11NA_HT20
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| HAL_MODE_11NA_HT40PLUS
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| HAL_MODE_11NA_HT40MINUS
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;
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if (pCap->halHTSupport == AH_TRUE && (mode & HAL_MODE_11G))
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mode |= HAL_MODE_11NG_HT20
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| HAL_MODE_11NG_HT40PLUS
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| HAL_MODE_11NG_HT40MINUS
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;
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return mode;
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}
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/*
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* Change the LED blinking pattern to correspond to the connectivity
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*/
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void
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ar5416SetLedState(struct ath_hal *ah, HAL_LED_STATE state)
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{
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static const uint32_t ledbits[8] = {
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AR_MAC_LED_ASSOC_NONE, /* HAL_LED_INIT */
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AR_MAC_LED_ASSOC_PEND, /* HAL_LED_SCAN */
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AR_MAC_LED_ASSOC_PEND, /* HAL_LED_AUTH */
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AR_MAC_LED_ASSOC_ACTIVE, /* HAL_LED_ASSOC*/
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AR_MAC_LED_ASSOC_ACTIVE, /* HAL_LED_RUN */
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AR_MAC_LED_ASSOC_NONE,
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AR_MAC_LED_ASSOC_NONE,
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AR_MAC_LED_ASSOC_NONE,
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};
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uint32_t bits;
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bits = OS_REG_READ(ah, AR_MAC_LED);
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bits = (bits &~ AR_MAC_LED_MODE)
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| SM(AR_MAC_LED_MODE_POWON, AR_MAC_LED_MODE)
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#if 1
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| SM(AR_MAC_LED_MODE_NETON, AR_MAC_LED_MODE)
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#endif
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;
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bits = (bits &~ AR_MAC_LED_ASSOC)
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| SM(ledbits[state & 0x7], AR_MAC_LED_ASSOC);
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OS_REG_WRITE(ah, AR_MAC_LED, bits);
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}
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/*
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* Reset the current hardware tsf for stamlme.
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*/
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void
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ar5416ResetTsf(struct ath_hal *ah)
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{
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uint32_t v;
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int i;
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for (i = 0; i < 10; i++) {
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v = OS_REG_READ(ah, AR_SLP32_MODE);
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if ((v & AR_SLP32_TSF_WRITE_STATUS) == 0)
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break;
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OS_DELAY(10);
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}
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OS_REG_WRITE(ah, AR_RESET_TSF, AR_RESET_TSF_ONCE);
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}
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HAL_BOOL
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ar5416SetAntennaSwitch(struct ath_hal *ah, HAL_ANT_SETTING settings)
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{
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return AH_TRUE;
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}
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/* Setup decompression for given key index */
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HAL_BOOL
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ar5416SetDecompMask(struct ath_hal *ah, uint16_t keyidx, int en)
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{
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return HAL_OK;
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}
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/* Setup coverage class */
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void
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ar5416SetCoverageClass(struct ath_hal *ah, uint8_t coverageclass, int now)
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{
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}
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/*
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* Return approximation of extension channel busy over an time interval
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* 0% (clear) -> 100% (busy)
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*
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*/
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uint32_t
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ar5416Get11nExtBusy(struct ath_hal *ah)
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{
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struct ath_hal_5416 *ahp = AH5416(ah);
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uint32_t busy; /* percentage */
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uint32_t cycleCount, ctlBusy, extBusy;
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ctlBusy = OS_REG_READ(ah, AR_RCCNT);
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extBusy = OS_REG_READ(ah, AR_EXTRCCNT);
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cycleCount = OS_REG_READ(ah, AR_CCCNT);
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if (ahp->ah_cycleCount == 0 || ahp->ah_cycleCount > cycleCount) {
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/*
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* Cycle counter wrap (or initial call); it's not possible
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* to accurately calculate a value because the registers
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* right shift rather than wrap--so punt and return 0.
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*/
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busy = 0;
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HALDEBUG(ah, HAL_DEBUG_ANY, "%s: cycle counter wrap. ExtBusy = 0\n",
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__func__);
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} else {
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uint32_t cycleDelta = cycleCount - ahp->ah_cycleCount;
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uint32_t ctlBusyDelta = ctlBusy - ahp->ah_ctlBusy;
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uint32_t extBusyDelta = extBusy - ahp->ah_extBusy;
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uint32_t ctlClearDelta = 0;
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/* Compute control channel rxclear.
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* The cycle delta may be less than the control channel delta.
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* This could be solved by freezing the timers (or an atomic read,
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* if one was available). Checking for the condition should be
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* sufficient.
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*/
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if (cycleDelta > ctlBusyDelta) {
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ctlClearDelta = cycleDelta - ctlBusyDelta;
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}
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/* Compute ratio of extension channel busy to control channel clear
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* as an approximation to extension channel cleanliness.
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*
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* According to the hardware folks, ext rxclear is undefined
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* if the ctrl rxclear is de-asserted (i.e. busy)
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*/
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if (ctlClearDelta) {
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busy = (extBusyDelta * 100) / ctlClearDelta;
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} else {
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busy = 100;
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}
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if (busy > 100) {
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busy = 100;
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}
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#if 0
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HALDEBUG(ah, HAL_DEBUG_ANY, "%s: cycleDelta 0x%x, ctlBusyDelta 0x%x, "
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"extBusyDelta 0x%x, ctlClearDelta 0x%x, "
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"busy %d\n",
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__func__, cycleDelta, ctlBusyDelta, extBusyDelta, ctlClearDelta, busy);
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#endif
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}
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ahp->ah_cycleCount = cycleCount;
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ahp->ah_ctlBusy = ctlBusy;
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ahp->ah_extBusy = extBusy;
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return busy;
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}
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/*
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* Configure 20/40 operation
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*
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* 20/40 = joint rx clear (control and extension)
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* 20 = rx clear (control)
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*
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* - NOTE: must stop MAC (tx) and requeue 40 MHz packets as 20 MHz when changing
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* from 20/40 => 20 only
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*/
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void
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ar5416Set11nMac2040(struct ath_hal *ah, HAL_HT_MACMODE mode)
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{
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uint32_t macmode;
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/* Configure MAC for 20/40 operation */
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if (mode == HAL_HT_MACMODE_2040) {
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macmode = AR_2040_JOINED_RX_CLEAR;
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} else {
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macmode = 0;
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}
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OS_REG_WRITE(ah, AR_2040_MODE, macmode);
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}
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/*
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* Get Rx clear (control/extension channel)
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*
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* Returns active low (busy) for ctrl/ext channel
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* Owl 2.0
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*/
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HAL_HT_RXCLEAR
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ar5416Get11nRxClear(struct ath_hal *ah)
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{
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HAL_HT_RXCLEAR rxclear = 0;
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uint32_t val;
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val = OS_REG_READ(ah, AR_DIAG_SW);
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/* control channel */
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if (val & AR_DIAG_RXCLEAR_CTL_LOW) {
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rxclear |= HAL_RX_CLEAR_CTL_LOW;
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}
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/* extension channel */
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if (val & AR_DIAG_RXCLEAR_CTL_LOW) {
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rxclear |= HAL_RX_CLEAR_EXT_LOW;
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}
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return rxclear;
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}
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/*
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* Set Rx clear (control/extension channel)
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*
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* Useful for forcing the channel to appear busy for
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* debugging/diagnostics
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* Owl 2.0
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*/
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void
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ar5416Set11nRxClear(struct ath_hal *ah, HAL_HT_RXCLEAR rxclear)
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{
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/* control channel */
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if (rxclear & HAL_RX_CLEAR_CTL_LOW) {
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OS_REG_SET_BIT(ah, AR_DIAG_SW, AR_DIAG_RXCLEAR_CTL_LOW);
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} else {
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OS_REG_CLR_BIT(ah, AR_DIAG_SW, AR_DIAG_RXCLEAR_CTL_LOW);
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}
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/* extension channel */
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if (rxclear & HAL_RX_CLEAR_EXT_LOW) {
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OS_REG_SET_BIT(ah, AR_DIAG_SW, AR_DIAG_RXCLEAR_EXT_LOW);
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} else {
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OS_REG_CLR_BIT(ah, AR_DIAG_SW, AR_DIAG_RXCLEAR_EXT_LOW);
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}
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}
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HAL_STATUS
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ar5416GetCapability(struct ath_hal *ah, HAL_CAPABILITY_TYPE type,
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uint32_t capability, uint32_t *result)
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{
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switch (type) {
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case HAL_CAP_BB_HANG:
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switch (capability) {
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case HAL_BB_HANG_RIFS:
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return AR_SREV_SOWL(ah) ? HAL_OK : HAL_ENOTSUPP;
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case HAL_BB_HANG_DFS:
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return AR_SREV_SOWL(ah) ? HAL_OK : HAL_ENOTSUPP;
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case HAL_BB_HANG_RX_CLEAR:
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return AR_SREV_MERLIN(ah) ? HAL_OK : HAL_ENOTSUPP;
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}
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break;
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case HAL_CAP_MAC_HANG:
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return ((ah->ah_macVersion == AR_XSREV_VERSION_OWL_PCI) ||
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(ah->ah_macVersion == AR_XSREV_VERSION_OWL_PCIE) ||
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AR_SREV_SOWL(ah)) ?
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HAL_OK : HAL_ENOTSUPP;
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default:
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break;
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}
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return ar5212GetCapability(ah, type, capability, result);
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}
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static int ar5416DetectMacHang(struct ath_hal *ah);
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static int ar5416DetectBBHang(struct ath_hal *ah);
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HAL_BOOL
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ar5416GetDiagState(struct ath_hal *ah, int request,
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const void *args, uint32_t argsize,
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void **result, uint32_t *resultsize)
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{
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struct ath_hal_5416 *ahp = AH5416(ah);
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int hangs;
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if (ath_hal_getdiagstate(ah, request, args, argsize, result, resultsize))
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return AH_TRUE;
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switch (request) {
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case HAL_DIAG_EEPROM:
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return ath_hal_eepromDiag(ah, request,
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args, argsize, result, resultsize);
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case HAL_DIAG_CHECK_HANGS:
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if (argsize != sizeof(int))
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return AH_FALSE;
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hangs = *(const int *) args;
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ahp->ah_hangs = 0;
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if (hangs & HAL_BB_HANGS)
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ahp->ah_hangs |= ar5416DetectBBHang(ah);
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/* NB: if BB is hung MAC will be hung too so skip check */
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if (ahp->ah_hangs == 0 && (hangs & HAL_MAC_HANGS))
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ahp->ah_hangs |= ar5416DetectMacHang(ah);
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*result = &ahp->ah_hangs;
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*resultsize = sizeof(ahp->ah_hangs);
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return AH_TRUE;
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}
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return ar5212GetDiagState(ah, request,
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args, argsize, result, resultsize);
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}
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typedef struct {
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uint32_t dma_dbg_3;
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uint32_t dma_dbg_4;
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uint32_t dma_dbg_5;
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uint32_t dma_dbg_6;
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} mac_dbg_regs_t;
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typedef enum {
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dcu_chain_state = 0x1,
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dcu_complete_state = 0x2,
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qcu_state = 0x4,
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qcu_fsp_ok = 0x8,
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qcu_fsp_state = 0x10,
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qcu_stitch_state = 0x20,
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qcu_fetch_state = 0x40,
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qcu_complete_state = 0x80
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} hal_mac_hangs_t;
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typedef struct {
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int states;
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uint8_t dcu_chain_state;
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uint8_t dcu_complete_state;
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uint8_t qcu_state;
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uint8_t qcu_fsp_ok;
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uint8_t qcu_fsp_state;
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uint8_t qcu_stitch_state;
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uint8_t qcu_fetch_state;
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uint8_t qcu_complete_state;
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} hal_mac_hang_check_t;
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static HAL_BOOL
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ar5416CompareDbgHang(struct ath_hal *ah, const mac_dbg_regs_t *regs,
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const hal_mac_hang_check_t *check)
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{
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int found_states;
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found_states = 0;
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if (check->states & dcu_chain_state) {
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int i;
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for (i = 0; i < 6; i++) {
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if (((regs->dma_dbg_4 >> (5*i)) & 0x1f) ==
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check->dcu_chain_state)
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found_states |= dcu_chain_state;
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}
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for (i = 0; i < 4; i++) {
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if (((regs->dma_dbg_5 >> (5*i)) & 0x1f) ==
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check->dcu_chain_state)
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found_states |= dcu_chain_state;
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}
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}
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if (check->states & dcu_complete_state) {
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if ((regs->dma_dbg_6 & 0x3) == check->dcu_complete_state)
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found_states |= dcu_complete_state;
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}
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if (check->states & qcu_stitch_state) {
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if (((regs->dma_dbg_3 >> 18) & 0xf) == check->qcu_stitch_state)
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found_states |= qcu_stitch_state;
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}
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if (check->states & qcu_fetch_state) {
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if (((regs->dma_dbg_3 >> 22) & 0xf) == check->qcu_fetch_state)
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found_states |= qcu_fetch_state;
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}
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if (check->states & qcu_complete_state) {
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if (((regs->dma_dbg_3 >> 26) & 0x7) == check->qcu_complete_state)
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found_states |= qcu_complete_state;
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}
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return (found_states == check->states);
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}
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#define NUM_STATUS_READS 50
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static int
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ar5416DetectMacHang(struct ath_hal *ah)
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{
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static const hal_mac_hang_check_t hang_sig1 = {
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.dcu_chain_state = 0x6,
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.dcu_complete_state = 0x1,
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.states = dcu_chain_state
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| dcu_complete_state,
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};
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static const hal_mac_hang_check_t hang_sig2 = {
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.qcu_stitch_state = 0x9,
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.qcu_fetch_state = 0x8,
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.qcu_complete_state = 0x4,
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.states = qcu_stitch_state
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| qcu_fetch_state
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| qcu_complete_state,
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};
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mac_dbg_regs_t mac_dbg;
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int i;
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mac_dbg.dma_dbg_3 = OS_REG_READ(ah, AR_DMADBG_3);
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mac_dbg.dma_dbg_4 = OS_REG_READ(ah, AR_DMADBG_4);
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mac_dbg.dma_dbg_5 = OS_REG_READ(ah, AR_DMADBG_5);
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mac_dbg.dma_dbg_6 = OS_REG_READ(ah, AR_DMADBG_6);
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for (i = 1; i <= NUM_STATUS_READS; i++) {
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if (mac_dbg.dma_dbg_3 != OS_REG_READ(ah, AR_DMADBG_3) ||
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mac_dbg.dma_dbg_4 != OS_REG_READ(ah, AR_DMADBG_4) ||
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mac_dbg.dma_dbg_5 != OS_REG_READ(ah, AR_DMADBG_5) ||
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mac_dbg.dma_dbg_6 != OS_REG_READ(ah, AR_DMADBG_6))
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return 0;
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}
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if (ar5416CompareDbgHang(ah, &mac_dbg, &hang_sig1))
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return HAL_MAC_HANG_SIG1;
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if (ar5416CompareDbgHang(ah, &mac_dbg, &hang_sig2))
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return HAL_MAC_HANG_SIG2;
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HALDEBUG(ah, HAL_DEBUG_ANY, "%s Found an unknown MAC hang signature "
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"DMADBG_3=0x%x DMADBG_4=0x%x DMADBG_5=0x%x DMADBG_6=0x%x\n",
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__func__, mac_dbg.dma_dbg_3, mac_dbg.dma_dbg_4, mac_dbg.dma_dbg_5,
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mac_dbg.dma_dbg_6);
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return HAL_MAC_HANG_UNKNOWN;
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}
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/*
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* Determine if the baseband using the Observation Bus Register
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*/
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static int
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ar5416DetectBBHang(struct ath_hal *ah)
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{
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#define N(a) (sizeof(a)/sizeof(a[0]))
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/*
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* Check the PCU Observation Bus 1 register (0x806c)
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* NUM_STATUS_READS times
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*
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* 4 known BB hang signatures -
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* [1] bits 8,9,11 are 0. State machine state (bits 25-31) is 0x1E
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* [2] bits 8,9 are 1, bit 11 is 0. State machine state
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* (bits 25-31) is 0x52
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* [3] bits 8,9 are 1, bit 11 is 0. State machine state
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* (bits 25-31) is 0x18
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* [4] bit 10 is 1, bit 11 is 0. WEP state (bits 12-17) is 0x2,
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* Rx State (bits 20-24) is 0x7.
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*/
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static const struct {
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uint32_t val;
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uint32_t mask;
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int code;
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} hang_list[] = {
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/* Reg Value Reg Mask Hang Code XXX */
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{ 0x1E000000, 0x7E000B00, HAL_BB_HANG_DFS },
|
|
{ 0x52000B00, 0x7E000B00, HAL_BB_HANG_RIFS },
|
|
{ 0x18000B00, 0x7E000B00, HAL_BB_HANG_RX_CLEAR },
|
|
{ 0x00702400, 0x7E7FFFEF, HAL_BB_HANG_RX_CLEAR }
|
|
};
|
|
uint32_t hang_sig;
|
|
int i;
|
|
|
|
hang_sig = OS_REG_READ(ah, AR_OBSERV_1);
|
|
for (i = 1; i <= NUM_STATUS_READS; i++) {
|
|
if (hang_sig != OS_REG_READ(ah, AR_OBSERV_1))
|
|
return 0;
|
|
}
|
|
for (i = 0; i < N(hang_list); i++)
|
|
if ((hang_sig & hang_list[i].mask) == hang_list[i].val) {
|
|
HALDEBUG(ah, HAL_DEBUG_ANY,
|
|
"%s BB hang, signature 0x%x, code 0x%x\n",
|
|
__func__, hang_sig, hang_list[i].code);
|
|
return hang_list[i].code;
|
|
}
|
|
|
|
HALDEBUG(ah, HAL_DEBUG_ANY, "%s Found an unknown BB hang signature! "
|
|
"<0x806c>=0x%x\n", __func__, hang_sig);
|
|
|
|
return HAL_BB_HANG_UNKNOWN;
|
|
#undef N
|
|
}
|
|
#undef NUM_STATUS_READS
|