b657b11d8d
channel when the channel is HT/40. The new ANI code (primarily for the AR9300/AR9400) in ath9k sets this register but the ANI code for the previous 11n chips didn't set this. Unlike ath9k, only set this for HT/40 channels. Obtained From: ath9k
875 lines
28 KiB
C
875 lines
28 KiB
C
/*
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* Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
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* Copyright (c) 2002-2008 Atheros Communications, Inc.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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* $FreeBSD$
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*/
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#include "opt_ah.h"
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/*
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* XXX this is virtually the same code as for 5212; we reuse
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* storage in the 5212 state block; need to refactor.
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*/
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#include "ah.h"
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#include "ah_internal.h"
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#include "ah_desc.h"
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#include "ar5416/ar5416.h"
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#include "ar5416/ar5416reg.h"
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#include "ar5416/ar5416phy.h"
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/*
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* Anti noise immunity support. We track phy errors and react
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* to excessive errors by adjusting the noise immunity parameters.
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*/
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#define HAL_EP_RND(x, mul) \
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((((x)%(mul)) >= ((mul)/2)) ? ((x) + ((mul) - 1)) / (mul) : (x)/(mul))
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#define BEACON_RSSI(ahp) \
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HAL_EP_RND(ahp->ah_stats.ast_nodestats.ns_avgbrssi, \
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HAL_RSSI_EP_MULTIPLIER)
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/*
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* ANI processing tunes radio parameters according to PHY errors
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* and related information. This is done for for noise and spur
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* immunity in all operating modes if the device indicates it's
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* capable at attach time. In addition, when there is a reference
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* rssi value (e.g. beacon frames from an ap in station mode)
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* further tuning is done.
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*
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* ANI_ENA indicates whether any ANI processing should be done;
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* this is specified at attach time.
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*
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* ANI_ENA_RSSI indicates whether rssi-based processing should
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* done, this is enabled based on operating mode and is meaningful
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* only if ANI_ENA is true.
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*
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* ANI parameters are typically controlled only by the hal. The
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* AniControl interface however permits manual tuning through the
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* diagnostic api.
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*/
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#define ANI_ENA(ah) \
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(AH5212(ah)->ah_procPhyErr & HAL_ANI_ENA)
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#define ANI_ENA_RSSI(ah) \
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(AH5212(ah)->ah_procPhyErr & HAL_RSSI_ANI_ENA)
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#define ah_mibStats ah_stats.ast_mibstats
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static void
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enableAniMIBCounters(struct ath_hal *ah, const struct ar5212AniParams *params)
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{
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struct ath_hal_5212 *ahp = AH5212(ah);
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HALDEBUG(ah, HAL_DEBUG_ANI, "%s: Enable mib counters: "
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"OfdmPhyErrBase 0x%x cckPhyErrBase 0x%x\n",
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__func__, params->ofdmPhyErrBase, params->cckPhyErrBase);
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OS_REG_WRITE(ah, AR_FILTOFDM, 0);
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OS_REG_WRITE(ah, AR_FILTCCK, 0);
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OS_REG_WRITE(ah, AR_PHYCNT1, params->ofdmPhyErrBase);
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OS_REG_WRITE(ah, AR_PHYCNT2, params->cckPhyErrBase);
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OS_REG_WRITE(ah, AR_PHY_ERR_MASK_1, AR_PHY_ERR_OFDM_TIMING);
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OS_REG_WRITE(ah, AR_PHY_ERR_MASK_2, AR_PHY_ERR_CCK_TIMING);
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ar5212UpdateMibCounters(ah, &ahp->ah_mibStats); /* save+clear counters*/
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ar5212EnableMibCounters(ah); /* enable everything */
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}
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static void
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disableAniMIBCounters(struct ath_hal *ah)
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{
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struct ath_hal_5212 *ahp = AH5212(ah);
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HALDEBUG(ah, HAL_DEBUG_ANI, "Disable MIB counters\n");
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ar5212UpdateMibCounters(ah, &ahp->ah_mibStats); /* save stats */
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ar5212DisableMibCounters(ah); /* disable everything */
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OS_REG_WRITE(ah, AR_PHY_ERR_MASK_1, 0);
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OS_REG_WRITE(ah, AR_PHY_ERR_MASK_2, 0);
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}
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static void
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setPhyErrBase(struct ath_hal *ah, struct ar5212AniParams *params)
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{
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if (params->ofdmTrigHigh >= AR_PHY_COUNTMAX) {
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HALDEBUG(ah, HAL_DEBUG_ANY,
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"OFDM Trigger %d is too high for hw counters, using max\n",
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params->ofdmTrigHigh);
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params->ofdmPhyErrBase = 0;
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} else
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params->ofdmPhyErrBase = AR_PHY_COUNTMAX - params->ofdmTrigHigh;
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if (params->cckTrigHigh >= AR_PHY_COUNTMAX) {
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HALDEBUG(ah, HAL_DEBUG_ANY,
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"CCK Trigger %d is too high for hw counters, using max\n",
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params->cckTrigHigh);
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params->cckPhyErrBase = 0;
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} else
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params->cckPhyErrBase = AR_PHY_COUNTMAX - params->cckTrigHigh;
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}
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/*
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* Setup ANI handling. Sets all thresholds and reset the
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* channel statistics. Note that ar5416AniReset should be
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* called by ar5416Reset before anything else happens and
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* that's where we force initial settings.
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*/
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void
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ar5416AniAttach(struct ath_hal *ah, const struct ar5212AniParams *params24,
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const struct ar5212AniParams *params5, HAL_BOOL enable)
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{
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struct ath_hal_5212 *ahp = AH5212(ah);
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if (params24 != AH_NULL) {
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OS_MEMCPY(&ahp->ah_aniParams24, params24, sizeof(*params24));
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setPhyErrBase(ah, &ahp->ah_aniParams24);
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}
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if (params5 != AH_NULL) {
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OS_MEMCPY(&ahp->ah_aniParams5, params5, sizeof(*params5));
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setPhyErrBase(ah, &ahp->ah_aniParams5);
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}
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OS_MEMZERO(ahp->ah_ani, sizeof(ahp->ah_ani));
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/* Enable MIB Counters */
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enableAniMIBCounters(ah, &ahp->ah_aniParams24 /*XXX*/);
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if (enable) { /* Enable ani now */
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HALASSERT(params24 != AH_NULL && params5 != AH_NULL);
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ahp->ah_procPhyErr |= HAL_ANI_ENA;
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} else {
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ahp->ah_procPhyErr &= ~HAL_ANI_ENA;
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}
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}
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/*
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* Cleanup any ANI state setup.
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*/
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void
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ar5416AniDetach(struct ath_hal *ah)
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{
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HALDEBUG(ah, HAL_DEBUG_ANI, "Detaching Ani\n");
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disableAniMIBCounters(ah);
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}
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/*
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* Control Adaptive Noise Immunity Parameters
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*/
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HAL_BOOL
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ar5416AniControl(struct ath_hal *ah, HAL_ANI_CMD cmd, int param)
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{
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typedef int TABLE[];
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struct ath_hal_5212 *ahp = AH5212(ah);
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struct ar5212AniState *aniState = ahp->ah_curani;
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const struct ar5212AniParams *params = aniState->params;
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OS_MARK(ah, AH_MARK_ANI_CONTROL, cmd);
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switch (cmd & AH5416(ah)->ah_ani_function) {
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case HAL_ANI_NOISE_IMMUNITY_LEVEL: {
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u_int level = param;
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HALDEBUG(ah, HAL_DEBUG_ANI, "%s: HAL_ANI_NOISE_IMMUNITY_LEVEL: set level = %d\n", __func__, level);
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if (level >= params->maxNoiseImmunityLevel) {
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HALDEBUG(ah, HAL_DEBUG_ANI,
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"%s: immunity level out of range (%u > %u)\n",
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__func__, level, params->maxNoiseImmunityLevel);
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return AH_FALSE;
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}
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OS_REG_RMW_FIELD(ah, AR_PHY_DESIRED_SZ,
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AR_PHY_DESIRED_SZ_TOT_DES, params->totalSizeDesired[level]);
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OS_REG_RMW_FIELD(ah, AR_PHY_AGC_CTL1,
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AR_PHY_AGC_CTL1_COARSE_LOW, params->coarseLow[level]);
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OS_REG_RMW_FIELD(ah, AR_PHY_AGC_CTL1,
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AR_PHY_AGC_CTL1_COARSE_HIGH, params->coarseHigh[level]);
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OS_REG_RMW_FIELD(ah, AR_PHY_FIND_SIG,
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AR_PHY_FIND_SIG_FIRPWR, params->firpwr[level]);
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if (level > aniState->noiseImmunityLevel)
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ahp->ah_stats.ast_ani_niup++;
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else if (level < aniState->noiseImmunityLevel)
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ahp->ah_stats.ast_ani_nidown++;
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aniState->noiseImmunityLevel = level;
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break;
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}
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case HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION: {
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static const TABLE m1ThreshLow = { 127, 50 };
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static const TABLE m2ThreshLow = { 127, 40 };
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static const TABLE m1Thresh = { 127, 0x4d };
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static const TABLE m2Thresh = { 127, 0x40 };
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static const TABLE m2CountThr = { 31, 16 };
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static const TABLE m2CountThrLow = { 63, 48 };
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u_int on = param ? 1 : 0;
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HALDEBUG(ah, HAL_DEBUG_ANI, "%s: HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION: %s\n", __func__, on ? "enabled" : "disabled");
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OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
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AR_PHY_SFCORR_LOW_M1_THRESH_LOW, m1ThreshLow[on]);
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OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
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AR_PHY_SFCORR_LOW_M2_THRESH_LOW, m2ThreshLow[on]);
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OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR,
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AR_PHY_SFCORR_M1_THRESH, m1Thresh[on]);
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OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR,
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AR_PHY_SFCORR_M2_THRESH, m2Thresh[on]);
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OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR,
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AR_PHY_SFCORR_M2COUNT_THR, m2CountThr[on]);
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OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
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AR_PHY_SFCORR_LOW_M2COUNT_THR_LOW, m2CountThrLow[on]);
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OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
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AR_PHY_SFCORR_EXT_M1_THRESH_LOW, m1ThreshLow[on]);
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OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
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AR_PHY_SFCORR_EXT_M2_THRESH_LOW, m2ThreshLow[on]);
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OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
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AR_PHY_SFCORR_EXT_M1_THRESH, m1Thresh[on]);
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OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
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AR_PHY_SFCORR_EXT_M2_THRESH, m2Thresh[on]);
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if (on) {
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OS_REG_SET_BIT(ah, AR_PHY_SFCORR_LOW,
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AR_PHY_SFCORR_LOW_USE_SELF_CORR_LOW);
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} else {
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OS_REG_CLR_BIT(ah, AR_PHY_SFCORR_LOW,
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AR_PHY_SFCORR_LOW_USE_SELF_CORR_LOW);
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}
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if (on)
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ahp->ah_stats.ast_ani_ofdmon++;
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else
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ahp->ah_stats.ast_ani_ofdmoff++;
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aniState->ofdmWeakSigDetectOff = !on;
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break;
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}
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case HAL_ANI_CCK_WEAK_SIGNAL_THR: {
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static const TABLE weakSigThrCck = { 8, 6 };
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u_int high = param ? 1 : 0;
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HALDEBUG(ah, HAL_DEBUG_ANI, "%s: HAL_ANI_CCK_WEAK_SIGNAL_THR: %s\n", __func__, high ? "high" : "low");
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OS_REG_RMW_FIELD(ah, AR_PHY_CCK_DETECT,
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AR_PHY_CCK_DETECT_WEAK_SIG_THR_CCK, weakSigThrCck[high]);
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if (high)
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ahp->ah_stats.ast_ani_cckhigh++;
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else
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ahp->ah_stats.ast_ani_ccklow++;
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aniState->cckWeakSigThreshold = high;
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break;
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}
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case HAL_ANI_FIRSTEP_LEVEL: {
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u_int level = param;
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HALDEBUG(ah, HAL_DEBUG_ANI, "%s: HAL_ANI_FIRSTEP_LEVEL: level = %d\n", __func__, level);
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if (level >= params->maxFirstepLevel) {
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HALDEBUG(ah, HAL_DEBUG_ANI,
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"%s: firstep level out of range (%u > %u)\n",
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__func__, level, params->maxFirstepLevel);
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return AH_FALSE;
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}
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OS_REG_RMW_FIELD(ah, AR_PHY_FIND_SIG,
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AR_PHY_FIND_SIG_FIRSTEP, params->firstep[level]);
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if (level > aniState->firstepLevel)
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ahp->ah_stats.ast_ani_stepup++;
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else if (level < aniState->firstepLevel)
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ahp->ah_stats.ast_ani_stepdown++;
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aniState->firstepLevel = level;
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break;
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}
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case HAL_ANI_SPUR_IMMUNITY_LEVEL: {
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u_int level = param;
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HALDEBUG(ah, HAL_DEBUG_ANI, "%s: HAL_ANI_SPUR_IMMUNITY_LEVEL: level = %d\n", __func__, level);
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if (level >= params->maxSpurImmunityLevel) {
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HALDEBUG(ah, HAL_DEBUG_ANI,
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"%s: spur immunity level out of range (%u > %u)\n",
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__func__, level, params->maxSpurImmunityLevel);
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return AH_FALSE;
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}
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OS_REG_RMW_FIELD(ah, AR_PHY_TIMING5,
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AR_PHY_TIMING5_CYCPWR_THR1, params->cycPwrThr1[level]);
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/* Only set the ext channel cycpwr_thr1 field for ht/40 */
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if (IEEE80211_IS_CHAN_HT40(AH_PRIVATE(ah)->ah_curchan))
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OS_REG_RMW_FIELD(ah, AR_PHY_EXT_CCA,
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AR_PHY_EXT_TIMING5_CYCPWR_THR1, params->cycPwrThr1[level]);
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if (level > aniState->spurImmunityLevel)
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ahp->ah_stats.ast_ani_spurup++;
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else if (level < aniState->spurImmunityLevel)
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ahp->ah_stats.ast_ani_spurdown++;
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aniState->spurImmunityLevel = level;
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break;
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}
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case HAL_ANI_PRESENT:
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break;
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case HAL_ANI_MODE:
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if (param == 0) {
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ahp->ah_procPhyErr &= ~HAL_ANI_ENA;
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/* Turn off HW counters if we have them */
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ar5416AniDetach(ah);
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} else { /* normal/auto mode */
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/* don't mess with state if already enabled */
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if (ahp->ah_procPhyErr & HAL_ANI_ENA)
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break;
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/* Enable MIB Counters */
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enableAniMIBCounters(ah, ahp->ah_curani != AH_NULL ?
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ahp->ah_curani->params: &ahp->ah_aniParams24 /*XXX*/);
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ahp->ah_procPhyErr |= HAL_ANI_ENA;
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}
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break;
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#ifdef AH_PRIVATE_DIAG
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case HAL_ANI_PHYERR_RESET:
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ahp->ah_stats.ast_ani_ofdmerrs = 0;
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ahp->ah_stats.ast_ani_cckerrs = 0;
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break;
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#endif /* AH_PRIVATE_DIAG */
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default:
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HALDEBUG(ah, HAL_DEBUG_ANI, "%s: invalid cmd %u\n",
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__func__, cmd);
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return AH_FALSE;
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}
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return AH_TRUE;
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}
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static void
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ar5416AniOfdmErrTrigger(struct ath_hal *ah)
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{
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struct ath_hal_5212 *ahp = AH5212(ah);
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const struct ieee80211_channel *chan = AH_PRIVATE(ah)->ah_curchan;
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struct ar5212AniState *aniState;
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const struct ar5212AniParams *params;
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HALASSERT(chan != AH_NULL);
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if (!ANI_ENA(ah))
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return;
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aniState = ahp->ah_curani;
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params = aniState->params;
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/* First, raise noise immunity level, up to max */
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if ((AH5416(ah)->ah_ani_function & HAL_ANI_NOISE_IMMUNITY_LEVEL) &&
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(aniState->noiseImmunityLevel+1 < params->maxNoiseImmunityLevel)) {
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ar5416AniControl(ah, HAL_ANI_NOISE_IMMUNITY_LEVEL,
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aniState->noiseImmunityLevel + 1);
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return;
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}
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/* then, raise spur immunity level, up to max */
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if ((AH5416(ah)->ah_ani_function & HAL_ANI_SPUR_IMMUNITY_LEVEL) &&
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(aniState->spurImmunityLevel+1 < params->maxSpurImmunityLevel)) {
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ar5416AniControl(ah, HAL_ANI_SPUR_IMMUNITY_LEVEL,
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aniState->spurImmunityLevel + 1);
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return;
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}
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if (ANI_ENA_RSSI(ah)) {
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int32_t rssi = BEACON_RSSI(ahp);
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if (rssi > params->rssiThrHigh) {
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/*
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* Beacon rssi is high, can turn off ofdm
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* weak sig detect.
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*/
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if (!aniState->ofdmWeakSigDetectOff) {
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ar5416AniControl(ah,
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HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION,
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AH_FALSE);
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ar5416AniControl(ah,
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HAL_ANI_SPUR_IMMUNITY_LEVEL, 0);
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return;
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}
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/*
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* If weak sig detect is already off, as last resort,
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* raise firstep level
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*/
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if (aniState->firstepLevel+1 < params->maxFirstepLevel) {
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ar5416AniControl(ah, HAL_ANI_FIRSTEP_LEVEL,
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aniState->firstepLevel + 1);
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return;
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}
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} else if (rssi > params->rssiThrLow) {
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/*
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* Beacon rssi in mid range, need ofdm weak signal
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* detect, but we can raise firststepLevel.
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*/
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if (aniState->ofdmWeakSigDetectOff)
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ar5416AniControl(ah,
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HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION,
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AH_TRUE);
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if (aniState->firstepLevel+1 < params->maxFirstepLevel)
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ar5416AniControl(ah, HAL_ANI_FIRSTEP_LEVEL,
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aniState->firstepLevel + 1);
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return;
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} else {
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/*
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* Beacon rssi is low, if in 11b/g mode, turn off ofdm
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* weak signal detection and zero firstepLevel to
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* maximize CCK sensitivity
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*/
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if (IEEE80211_IS_CHAN_CCK(chan)) {
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if (!aniState->ofdmWeakSigDetectOff)
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ar5416AniControl(ah,
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HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION,
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AH_FALSE);
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if (aniState->firstepLevel > 0)
|
|
ar5416AniControl(ah,
|
|
HAL_ANI_FIRSTEP_LEVEL, 0);
|
|
return;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
static void
|
|
ar5416AniCckErrTrigger(struct ath_hal *ah)
|
|
{
|
|
struct ath_hal_5212 *ahp = AH5212(ah);
|
|
const struct ieee80211_channel *chan = AH_PRIVATE(ah)->ah_curchan;
|
|
struct ar5212AniState *aniState;
|
|
const struct ar5212AniParams *params;
|
|
|
|
HALASSERT(chan != AH_NULL);
|
|
|
|
if (!ANI_ENA(ah))
|
|
return;
|
|
|
|
/* first, raise noise immunity level, up to max */
|
|
aniState = ahp->ah_curani;
|
|
params = aniState->params;
|
|
if (aniState->noiseImmunityLevel+1 < params->maxNoiseImmunityLevel) {
|
|
ar5416AniControl(ah, HAL_ANI_NOISE_IMMUNITY_LEVEL,
|
|
aniState->noiseImmunityLevel + 1);
|
|
return;
|
|
}
|
|
|
|
if (ANI_ENA_RSSI(ah)) {
|
|
int32_t rssi = BEACON_RSSI(ahp);
|
|
if (rssi > params->rssiThrLow) {
|
|
/*
|
|
* Beacon signal in mid and high range,
|
|
* raise firstep level.
|
|
*/
|
|
if (aniState->firstepLevel+1 < params->maxFirstepLevel)
|
|
ar5416AniControl(ah, HAL_ANI_FIRSTEP_LEVEL,
|
|
aniState->firstepLevel + 1);
|
|
} else {
|
|
/*
|
|
* Beacon rssi is low, zero firstep level to maximize
|
|
* CCK sensitivity in 11b/g mode.
|
|
*/
|
|
if (IEEE80211_IS_CHAN_CCK(chan)) {
|
|
if (aniState->firstepLevel > 0)
|
|
ar5416AniControl(ah,
|
|
HAL_ANI_FIRSTEP_LEVEL, 0);
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
static void
|
|
ar5416AniRestart(struct ath_hal *ah, struct ar5212AniState *aniState)
|
|
{
|
|
struct ath_hal_5212 *ahp = AH5212(ah);
|
|
const struct ar5212AniParams *params = aniState->params;
|
|
|
|
aniState->listenTime = 0;
|
|
/*
|
|
* NB: these are written on reset based on the
|
|
* ini so we must re-write them!
|
|
*/
|
|
HALDEBUG(ah, HAL_DEBUG_ANI,
|
|
"%s: Writing ofdmbase=%u cckbase=%u\n", __func__,
|
|
params->ofdmPhyErrBase, params->cckPhyErrBase);
|
|
OS_REG_WRITE(ah, AR_PHY_ERR_1, params->ofdmPhyErrBase);
|
|
OS_REG_WRITE(ah, AR_PHY_ERR_2, params->cckPhyErrBase);
|
|
OS_REG_WRITE(ah, AR_PHY_ERR_MASK_1, AR_PHY_ERR_OFDM_TIMING);
|
|
OS_REG_WRITE(ah, AR_PHY_ERR_MASK_2, AR_PHY_ERR_CCK_TIMING);
|
|
|
|
/* Clear the mib counters and save them in the stats */
|
|
ar5212UpdateMibCounters(ah, &ahp->ah_mibStats);
|
|
aniState->ofdmPhyErrCount = 0;
|
|
aniState->cckPhyErrCount = 0;
|
|
}
|
|
|
|
/*
|
|
* Restore/reset the ANI parameters and reset the statistics.
|
|
* This routine must be called for every channel change.
|
|
*
|
|
* NOTE: This is where ah_curani is set; other ani code assumes
|
|
* it is setup to reflect the current channel.
|
|
*/
|
|
void
|
|
ar5416AniReset(struct ath_hal *ah, const struct ieee80211_channel *chan,
|
|
HAL_OPMODE opmode, int restore)
|
|
{
|
|
struct ath_hal_5212 *ahp = AH5212(ah);
|
|
HAL_CHANNEL_INTERNAL *ichan = ath_hal_checkchannel(ah, chan);
|
|
/* XXX bounds check ic_devdata */
|
|
struct ar5212AniState *aniState = &ahp->ah_ani[chan->ic_devdata];
|
|
uint32_t rxfilter;
|
|
|
|
if ((ichan->privFlags & CHANNEL_ANI_INIT) == 0) {
|
|
OS_MEMZERO(aniState, sizeof(*aniState));
|
|
if (IEEE80211_IS_CHAN_2GHZ(chan))
|
|
aniState->params = &ahp->ah_aniParams24;
|
|
else
|
|
aniState->params = &ahp->ah_aniParams5;
|
|
ichan->privFlags |= CHANNEL_ANI_INIT;
|
|
HALASSERT((ichan->privFlags & CHANNEL_ANI_SETUP) == 0);
|
|
}
|
|
ahp->ah_curani = aniState;
|
|
#if 0
|
|
ath_hal_printf(ah,"%s: chan %u/0x%x restore %d opmode %u%s\n",
|
|
__func__, chan->ic_freq, chan->ic_flags, restore, opmode,
|
|
ichan->privFlags & CHANNEL_ANI_SETUP ? " setup" : "");
|
|
#else
|
|
HALDEBUG(ah, HAL_DEBUG_ANI, "%s: chan %u/0x%x restore %d opmode %u%s\n",
|
|
__func__, chan->ic_freq, chan->ic_flags, restore, opmode,
|
|
ichan->privFlags & CHANNEL_ANI_SETUP ? " setup" : "");
|
|
#endif
|
|
OS_MARK(ah, AH_MARK_ANI_RESET, opmode);
|
|
|
|
/*
|
|
* Turn off PHY error frame delivery while we futz with settings.
|
|
*/
|
|
rxfilter = ar5212GetRxFilter(ah);
|
|
ar5212SetRxFilter(ah, rxfilter &~ HAL_RX_FILTER_PHYERR);
|
|
/*
|
|
* Automatic processing is done only in station mode right now.
|
|
*/
|
|
if (opmode == HAL_M_STA)
|
|
ahp->ah_procPhyErr |= HAL_RSSI_ANI_ENA;
|
|
else
|
|
ahp->ah_procPhyErr &= ~HAL_RSSI_ANI_ENA;
|
|
/*
|
|
* Set all ani parameters. We either set them to initial
|
|
* values or restore the previous ones for the channel.
|
|
* XXX if ANI follows hardware, we don't care what mode we're
|
|
* XXX in, we should keep the ani parameters
|
|
*/
|
|
if (restore && (ichan->privFlags & CHANNEL_ANI_SETUP)) {
|
|
ar5416AniControl(ah, HAL_ANI_NOISE_IMMUNITY_LEVEL,
|
|
aniState->noiseImmunityLevel);
|
|
ar5416AniControl(ah, HAL_ANI_SPUR_IMMUNITY_LEVEL,
|
|
aniState->spurImmunityLevel);
|
|
ar5416AniControl(ah, HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION,
|
|
!aniState->ofdmWeakSigDetectOff);
|
|
ar5416AniControl(ah, HAL_ANI_CCK_WEAK_SIGNAL_THR,
|
|
aniState->cckWeakSigThreshold);
|
|
ar5416AniControl(ah, HAL_ANI_FIRSTEP_LEVEL,
|
|
aniState->firstepLevel);
|
|
} else {
|
|
ar5416AniControl(ah, HAL_ANI_NOISE_IMMUNITY_LEVEL, 0);
|
|
ar5416AniControl(ah, HAL_ANI_SPUR_IMMUNITY_LEVEL, 0);
|
|
ar5416AniControl(ah, HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION,
|
|
AH_TRUE);
|
|
ar5416AniControl(ah, HAL_ANI_CCK_WEAK_SIGNAL_THR, AH_FALSE);
|
|
ar5416AniControl(ah, HAL_ANI_FIRSTEP_LEVEL, 0);
|
|
ichan->privFlags |= CHANNEL_ANI_SETUP;
|
|
}
|
|
ar5416AniRestart(ah, aniState);
|
|
|
|
/* restore RX filter mask */
|
|
ar5212SetRxFilter(ah, rxfilter);
|
|
}
|
|
|
|
/*
|
|
* Process a MIB interrupt. We may potentially be invoked because
|
|
* any of the MIB counters overflow/trigger so don't assume we're
|
|
* here because a PHY error counter triggered.
|
|
*/
|
|
void
|
|
ar5416ProcessMibIntr(struct ath_hal *ah, const HAL_NODE_STATS *stats)
|
|
{
|
|
struct ath_hal_5212 *ahp = AH5212(ah);
|
|
uint32_t phyCnt1, phyCnt2;
|
|
|
|
HALDEBUG(ah, HAL_DEBUG_ANI, "%s: mibc 0x%x phyCnt1 0x%x phyCnt2 0x%x "
|
|
"filtofdm 0x%x filtcck 0x%x\n",
|
|
__func__, OS_REG_READ(ah, AR_MIBC),
|
|
OS_REG_READ(ah, AR_PHYCNT1), OS_REG_READ(ah, AR_PHYCNT2),
|
|
OS_REG_READ(ah, AR_FILTOFDM), OS_REG_READ(ah, AR_FILTCCK));
|
|
|
|
/*
|
|
* First order of business is to clear whatever caused
|
|
* the interrupt so we don't keep getting interrupted.
|
|
* We have the usual mib counters that are reset-on-read
|
|
* and the additional counters that appeared starting in
|
|
* Hainan. We collect the mib counters and explicitly
|
|
* zero additional counters we are not using. Anything
|
|
* else is reset only if it caused the interrupt.
|
|
*/
|
|
/* NB: these are not reset-on-read */
|
|
phyCnt1 = OS_REG_READ(ah, AR_PHY_ERR_1);
|
|
phyCnt2 = OS_REG_READ(ah, AR_PHY_ERR_2);
|
|
/* not used, always reset them in case they are the cause */
|
|
OS_REG_WRITE(ah, AR_FILTOFDM, 0);
|
|
OS_REG_WRITE(ah, AR_FILTCCK, 0);
|
|
if ((OS_REG_READ(ah, AR_SLP_MIB_CTRL) & AR_SLP_MIB_PENDING) == 0)
|
|
OS_REG_WRITE(ah, AR_SLP_MIB_CTRL, AR_SLP_MIB_CLEAR);
|
|
|
|
/* Clear the mib counters and save them in the stats */
|
|
ar5212UpdateMibCounters(ah, &ahp->ah_mibStats);
|
|
ahp->ah_stats.ast_nodestats = *stats;
|
|
|
|
/*
|
|
* Check for an ani stat hitting the trigger threshold.
|
|
* When this happens we get a MIB interrupt and the top
|
|
* 2 bits of the counter register will be 0b11, hence
|
|
* the mask check of phyCnt?.
|
|
*/
|
|
if (((phyCnt1 & AR_MIBCNT_INTRMASK) == AR_MIBCNT_INTRMASK) ||
|
|
((phyCnt2 & AR_MIBCNT_INTRMASK) == AR_MIBCNT_INTRMASK)) {
|
|
struct ar5212AniState *aniState = ahp->ah_curani;
|
|
const struct ar5212AniParams *params = aniState->params;
|
|
uint32_t ofdmPhyErrCnt, cckPhyErrCnt;
|
|
|
|
ofdmPhyErrCnt = phyCnt1 - params->ofdmPhyErrBase;
|
|
ahp->ah_stats.ast_ani_ofdmerrs +=
|
|
ofdmPhyErrCnt - aniState->ofdmPhyErrCount;
|
|
aniState->ofdmPhyErrCount = ofdmPhyErrCnt;
|
|
|
|
cckPhyErrCnt = phyCnt2 - params->cckPhyErrBase;
|
|
ahp->ah_stats.ast_ani_cckerrs +=
|
|
cckPhyErrCnt - aniState->cckPhyErrCount;
|
|
aniState->cckPhyErrCount = cckPhyErrCnt;
|
|
|
|
/*
|
|
* NB: figure out which counter triggered. If both
|
|
* trigger we'll only deal with one as the processing
|
|
* clobbers the error counter so the trigger threshold
|
|
* check will never be true.
|
|
*/
|
|
if (aniState->ofdmPhyErrCount > params->ofdmTrigHigh)
|
|
ar5416AniOfdmErrTrigger(ah);
|
|
if (aniState->cckPhyErrCount > params->cckTrigHigh)
|
|
ar5416AniCckErrTrigger(ah);
|
|
/* NB: always restart to insure the h/w counters are reset */
|
|
ar5416AniRestart(ah, aniState);
|
|
}
|
|
}
|
|
|
|
static void
|
|
ar5416AniLowerImmunity(struct ath_hal *ah)
|
|
{
|
|
struct ath_hal_5212 *ahp = AH5212(ah);
|
|
struct ar5212AniState *aniState;
|
|
const struct ar5212AniParams *params;
|
|
|
|
HALASSERT(ANI_ENA(ah));
|
|
|
|
aniState = ahp->ah_curani;
|
|
params = aniState->params;
|
|
if (ANI_ENA_RSSI(ah)) {
|
|
int32_t rssi = BEACON_RSSI(ahp);
|
|
if (rssi > params->rssiThrHigh) {
|
|
/*
|
|
* Beacon signal is high, leave ofdm weak signal
|
|
* detection off or it may oscillate. Let it fall
|
|
* through.
|
|
*/
|
|
} else if (rssi > params->rssiThrLow) {
|
|
/*
|
|
* Beacon rssi in mid range, turn on ofdm weak signal
|
|
* detection or lower firstep level.
|
|
*/
|
|
if (aniState->ofdmWeakSigDetectOff) {
|
|
ar5416AniControl(ah,
|
|
HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION,
|
|
AH_TRUE);
|
|
return;
|
|
}
|
|
if (aniState->firstepLevel > 0) {
|
|
ar5416AniControl(ah, HAL_ANI_FIRSTEP_LEVEL,
|
|
aniState->firstepLevel - 1);
|
|
return;
|
|
}
|
|
} else {
|
|
/*
|
|
* Beacon rssi is low, reduce firstep level.
|
|
*/
|
|
if (aniState->firstepLevel > 0) {
|
|
ar5416AniControl(ah, HAL_ANI_FIRSTEP_LEVEL,
|
|
aniState->firstepLevel - 1);
|
|
return;
|
|
}
|
|
}
|
|
}
|
|
/* then lower spur immunity level, down to zero */
|
|
if (aniState->spurImmunityLevel > 0) {
|
|
ar5416AniControl(ah, HAL_ANI_SPUR_IMMUNITY_LEVEL,
|
|
aniState->spurImmunityLevel - 1);
|
|
return;
|
|
}
|
|
/*
|
|
* if all else fails, lower noise immunity level down to a min value
|
|
* zero for now
|
|
*/
|
|
if (aniState->noiseImmunityLevel > 0) {
|
|
ar5416AniControl(ah, HAL_ANI_NOISE_IMMUNITY_LEVEL,
|
|
aniState->noiseImmunityLevel - 1);
|
|
return;
|
|
}
|
|
}
|
|
|
|
#define CLOCK_RATE 44000 /* XXX use mac_usec or similar */
|
|
/* convert HW counter values to ms using 11g clock rate, goo9d enough
|
|
for 11a and Turbo */
|
|
|
|
/*
|
|
* Return an approximation of the time spent ``listening'' by
|
|
* deducting the cycles spent tx'ing and rx'ing from the total
|
|
* cycle count since our last call. A return value <0 indicates
|
|
* an invalid/inconsistent time.
|
|
*/
|
|
static int32_t
|
|
ar5416AniGetListenTime(struct ath_hal *ah)
|
|
{
|
|
struct ath_hal_5212 *ahp = AH5212(ah);
|
|
struct ar5212AniState *aniState;
|
|
uint32_t txFrameCount, rxFrameCount, cycleCount;
|
|
int32_t listenTime;
|
|
|
|
txFrameCount = OS_REG_READ(ah, AR_TFCNT);
|
|
rxFrameCount = OS_REG_READ(ah, AR_RFCNT);
|
|
cycleCount = OS_REG_READ(ah, AR_CCCNT);
|
|
|
|
aniState = ahp->ah_curani;
|
|
if (aniState->cycleCount == 0 || aniState->cycleCount > cycleCount) {
|
|
/*
|
|
* Cycle counter wrap (or initial call); it's not possible
|
|
* to accurately calculate a value because the registers
|
|
* right shift rather than wrap--so punt and return 0.
|
|
*/
|
|
listenTime = 0;
|
|
ahp->ah_stats.ast_ani_lzero++;
|
|
} else {
|
|
int32_t ccdelta = cycleCount - aniState->cycleCount;
|
|
int32_t rfdelta = rxFrameCount - aniState->rxFrameCount;
|
|
int32_t tfdelta = txFrameCount - aniState->txFrameCount;
|
|
listenTime = (ccdelta - rfdelta - tfdelta) / CLOCK_RATE;
|
|
}
|
|
aniState->cycleCount = cycleCount;
|
|
aniState->txFrameCount = txFrameCount;
|
|
aniState->rxFrameCount = rxFrameCount;
|
|
return listenTime;
|
|
}
|
|
|
|
/*
|
|
* Update ani stats in preparation for listen time processing.
|
|
*/
|
|
static void
|
|
updateMIBStats(struct ath_hal *ah, struct ar5212AniState *aniState)
|
|
{
|
|
struct ath_hal_5212 *ahp = AH5212(ah);
|
|
const struct ar5212AniParams *params = aniState->params;
|
|
uint32_t phyCnt1, phyCnt2;
|
|
int32_t ofdmPhyErrCnt, cckPhyErrCnt;
|
|
|
|
/* Clear the mib counters and save them in the stats */
|
|
ar5212UpdateMibCounters(ah, &ahp->ah_mibStats);
|
|
|
|
/* NB: these are not reset-on-read */
|
|
phyCnt1 = OS_REG_READ(ah, AR_PHY_ERR_1);
|
|
phyCnt2 = OS_REG_READ(ah, AR_PHY_ERR_2);
|
|
|
|
/* NB: these are spec'd to never roll-over */
|
|
ofdmPhyErrCnt = phyCnt1 - params->ofdmPhyErrBase;
|
|
if (ofdmPhyErrCnt < 0) {
|
|
HALDEBUG(ah, HAL_DEBUG_ANI, "OFDM phyErrCnt %d phyCnt1 0x%x\n",
|
|
ofdmPhyErrCnt, phyCnt1);
|
|
ofdmPhyErrCnt = AR_PHY_COUNTMAX;
|
|
}
|
|
ahp->ah_stats.ast_ani_ofdmerrs +=
|
|
ofdmPhyErrCnt - aniState->ofdmPhyErrCount;
|
|
aniState->ofdmPhyErrCount = ofdmPhyErrCnt;
|
|
|
|
cckPhyErrCnt = phyCnt2 - params->cckPhyErrBase;
|
|
if (cckPhyErrCnt < 0) {
|
|
HALDEBUG(ah, HAL_DEBUG_ANI, "CCK phyErrCnt %d phyCnt2 0x%x\n",
|
|
cckPhyErrCnt, phyCnt2);
|
|
cckPhyErrCnt = AR_PHY_COUNTMAX;
|
|
}
|
|
ahp->ah_stats.ast_ani_cckerrs +=
|
|
cckPhyErrCnt - aniState->cckPhyErrCount;
|
|
aniState->cckPhyErrCount = cckPhyErrCnt;
|
|
}
|
|
|
|
void
|
|
ar5416RxMonitor(struct ath_hal *ah, const HAL_NODE_STATS *stats,
|
|
const struct ieee80211_channel *chan)
|
|
{
|
|
struct ath_hal_5212 *ahp = AH5212(ah);
|
|
ahp->ah_stats.ast_nodestats.ns_avgbrssi = stats->ns_avgbrssi;
|
|
}
|
|
|
|
/*
|
|
* Do periodic processing. This routine is called from the
|
|
* driver's rx interrupt handler after processing frames.
|
|
*/
|
|
void
|
|
ar5416AniPoll(struct ath_hal *ah, const struct ieee80211_channel *chan)
|
|
{
|
|
struct ath_hal_5212 *ahp = AH5212(ah);
|
|
struct ar5212AniState *aniState = ahp->ah_curani;
|
|
const struct ar5212AniParams *params;
|
|
int32_t listenTime;
|
|
|
|
/* XXX can aniState be null? */
|
|
if (aniState == AH_NULL)
|
|
return;
|
|
if (!ANI_ENA(ah))
|
|
return;
|
|
|
|
listenTime = ar5416AniGetListenTime(ah);
|
|
if (listenTime < 0) {
|
|
ahp->ah_stats.ast_ani_lneg++;
|
|
/* restart ANI period if listenTime is invalid */
|
|
ar5416AniRestart(ah, aniState);
|
|
}
|
|
/* XXX beware of overflow? */
|
|
aniState->listenTime += listenTime;
|
|
|
|
OS_MARK(ah, AH_MARK_ANI_POLL, aniState->listenTime);
|
|
|
|
params = aniState->params;
|
|
if (aniState->listenTime > 5*params->period) {
|
|
/*
|
|
* Check to see if need to lower immunity if
|
|
* 5 aniPeriods have passed
|
|
*/
|
|
updateMIBStats(ah, aniState);
|
|
if (aniState->ofdmPhyErrCount <= aniState->listenTime *
|
|
params->ofdmTrigLow/1000 &&
|
|
aniState->cckPhyErrCount <= aniState->listenTime *
|
|
params->cckTrigLow/1000)
|
|
ar5416AniLowerImmunity(ah);
|
|
ar5416AniRestart(ah, aniState);
|
|
} else if (aniState->listenTime > params->period) {
|
|
updateMIBStats(ah, aniState);
|
|
/* check to see if need to raise immunity */
|
|
if (aniState->ofdmPhyErrCount > aniState->listenTime *
|
|
params->ofdmTrigHigh / 1000) {
|
|
HALDEBUG(ah, HAL_DEBUG_ANI,
|
|
"%s: OFDM err %u listenTime %u\n", __func__,
|
|
aniState->ofdmPhyErrCount, aniState->listenTime);
|
|
ar5416AniOfdmErrTrigger(ah);
|
|
ar5416AniRestart(ah, aniState);
|
|
} else if (aniState->cckPhyErrCount > aniState->listenTime *
|
|
params->cckTrigHigh / 1000) {
|
|
HALDEBUG(ah, HAL_DEBUG_ANI,
|
|
"%s: CCK err %u listenTime %u\n", __func__,
|
|
aniState->ofdmPhyErrCount, aniState->listenTime);
|
|
ar5416AniCckErrTrigger(ah);
|
|
ar5416AniRestart(ah, aniState);
|
|
}
|
|
}
|
|
}
|