1037 lines
30 KiB
C
1037 lines
30 KiB
C
/*-
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* Copyright (c) 1992, 1993, 1995 Eugene W. Stark
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Eugene W. Stark.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY EUGENE W. STARK (THE AUTHOR) ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include "tw.h"
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#if NTW > 0
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/*
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* Driver configuration parameters
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*/
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/*
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* Time for 1/2 of a power line cycle, in microseconds.
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* Change this to 10000 for 50Hz power. Phil Sampson
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* (vk2jnt@gw.vk2jnt.ampr.org OR sampson@gidday.enet.dec.com)
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* reports that this works (at least in Australia) using a
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* TW7223 module (a local version of the TW523).
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*/
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#define HALFCYCLE 8333 /* 1/2 cycle = 8333us at 60Hz */
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/*
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* Undefine the following if you don't have the high-resolution "microtime"
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* routines (leave defined for FreeBSD, which has them).
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*/
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#define HIRESTIME
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/*
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* End of driver configuration parameters
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*/
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/*
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* FreeBSD Device Driver for X-10 POWERHOUSE (tm)
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* Two-Way Power Line Interface, Model #TW523
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*
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* written by Eugene W. Stark (stark@cs.sunysb.edu)
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* December 2, 1992
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*
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* NOTES:
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*
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* The TW523 is a carrier-current modem for home control/automation purposes.
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* It is made by:
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*
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* X-10 Inc.
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* 185A LeGrand Ave.
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* Northvale, NJ 07647
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* USA
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* (201) 784-9700 or 1-800-526-0027
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*
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* X-10 Home Controls Inc.
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* 1200 Aerowood Drive, Unit 20
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* Mississauga, Ontario
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* (416) 624-4446 or 1-800-387-3346
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*
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* The TW523 is designed for communications using the X-10 protocol,
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* which is compatible with a number of home control systems, including
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* Radio Shack "Plug 'n Power(tm)" and Stanley "Lightmaker(tm)."
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* I bought my TW523 from:
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*
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* Home Control Concepts
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* 9353-C Activity Road
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* San Diego, CA 92126
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* (619) 693-8887
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*
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* They supplied me with the TW523 (which has an RJ-11 four-wire modular
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* telephone connector), a modular cable, an RJ-11 to DB-25 connector with
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* internal wiring, documentation from X-10 on the TW523 (very good),
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* an instruction manual by Home Control Concepts (not very informative),
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* and a floppy disk containing binary object code of some demonstration/test
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* programs and of a C function library suitable for controlling the TW523
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* by an IBM PC under MS-DOS (not useful to me other than to verify that
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* the unit worked). I suggest saving money and buying the bare TW523
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* rather than the TW523 development kit (what I bought), because if you
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* are running FreeBSD you don't really care about the DOS binaries.
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*
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* The interface to the TW-523 consists of four wires on the RJ-11 connector,
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* which are jumpered to somewhat more wires on the DB-25 connector, which
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* in turn is intended to plug into the PC parallel printer port. I dismantled
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* the DB-25 connector to find out what they had done:
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*
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* Signal RJ-11 pin DB-25 pin(s) Parallel Port
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* Transmit TX 4 (Y) 2, 4, 6, 8 Data out
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* Receive RX 3 (G) 10, 14 -ACK, -AutoFeed
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* Common 2 (R) 25 Common
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* Zero crossing 1 (B) 17 -Select Input
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*
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* The zero crossing signal is used to synchronize transmission to the
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* zero crossings of the AC line, as detailed in the X-10 documentation.
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* It would be nice if one could generate interrupts with this signal,
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* however one needs interrupts on both the rising and falling edges,
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* and the -ACK signal to the parallel port interrupts only on the falling
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* edge, so it can't be done without additional hardware.
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*
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* In this driver, the transmit function is performed in a non-interrupt-driven
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* fashion, by polling the zero crossing signal to determine when a transition
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* has occurred. This wastes CPU time during transmission, but it seems like
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* the best that can be done without additional hardware. One problem with
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* the scheme is that preemption of the CPU during transmission can cause loss
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* of sync. The driver tries to catch this, by noticing that a long delay
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* loop has somehow become foreshortened, and the transmission is aborted with
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* an error return. It is up to the user level software to handle this
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* situation (most likely by retrying the transmission).
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/proc.h>
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#include <sys/conf.h>
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#include <sys/buf.h>
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#include <sys/kernel.h>
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#include <sys/ioctl.h>
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#include <sys/uio.h>
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#include <sys/syslog.h>
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#include <sys/select.h>
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#ifdef DEVFS
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#include <sys/devfsext.h>
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#endif /*DEVFS*/
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#define MIN(a,b) ((a)<(b)?(a):(b))
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#ifdef HIRESTIME
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#include <sys/time.h>
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#endif /* HIRESTIME */
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#include <i386/isa/isa_device.h>
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/*
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* Transmission is done by calling write() to send three byte packets of data.
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* The first byte contains a four bit house code (0=A to 15=P).
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* The second byte contains five bit unit/key code (0=unit 1 to 15=unit 16,
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* 16=All Units Off to 31 = Status Request). The third byte specifies
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* the number of times the packet is to be transmitted without any
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* gaps between successive transmissions. Normally this is 2, as per
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* the X-10 documentation, but sometimes (e.g. for bright and dim codes)
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* it can be another value. Each call to write can specify an arbitrary
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* number of data bytes. An incomplete packet is buffered until a subsequent
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* call to write() provides data to complete it. At most one packet will
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* actually be processed in any call to write(). Successive calls to write()
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* leave a three-cycle gap between transmissions, per the X-10 documentation.
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*
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* Reception is done using read().
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* The driver produces a series of three-character packets.
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* In each packet, the first character consists of flags,
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* the second character is a four bit house code (0-15),
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* and the third character is a five bit key/function code (0-31).
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* The flags are the following:
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*/
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#define TW_RCV_LOCAL 1 /* The packet arrived during a local transmission */
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#define TW_RCV_ERROR 2 /* An invalid/corrupted packet was received */
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/*
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* IBM PC parallel port definitions relevant to TW523
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*/
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#define tw_data 0 /* Data to tw523 (R/W) */
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#define tw_status 1 /* Status of tw523 (R) */
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#define TWS_RDATA 0x40 /* tw523 receive data */
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#define tw_control 2 /* Control tw523 (R/W) */
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#define TWC_SYNC 0x08 /* tw523 sync (pin 17) */
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#define TWC_ENA 0x10 /* tw523 interrupt enable */
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/*
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* Miscellaneous defines
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*/
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#define TWUNIT(dev) (minor(dev)) /* Extract unit number from device */
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#define TWPRI (PZERO+8) /* I don't know any better, so let's */
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/* use the same as the line printer */
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static int twprobe(struct isa_device *idp);
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static int twattach(struct isa_device *idp);
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struct isa_driver twdriver = {
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twprobe, twattach, "tw"
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};
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static d_open_t twopen;
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static d_close_t twclose;
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static d_read_t twread;
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static d_write_t twwrite;
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static d_select_t twselect;
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#define CDEV_MAJOR 19
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static struct cdevsw tw_cdevsw =
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{ twopen, twclose, twread, twwrite, /*19*/
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noioc, nullstop, nullreset, nodevtotty, /* tw */
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twselect, nommap, nostrat, "tw", NULL, -1 };
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/*
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* Software control structure for TW523
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*/
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#define TWS_XMITTING 1 /* Transmission in progress */
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#define TWS_RCVING 2 /* Reception in progress */
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#define TWS_WANT 4 /* A process wants received data */
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#define TWS_OPEN 8 /* Is it currently open? */
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#define TW_SIZE 3*60 /* Enough for about 10 sec. of input */
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static struct tw_sc {
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u_int sc_port; /* I/O Port */
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u_int sc_state; /* Current software control state */
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struct selinfo sc_selp; /* Information for select() */
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u_char sc_xphase; /* Current state of sync (for transmitter) */
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u_char sc_rphase; /* Current state of sync (for receiver) */
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u_char sc_flags; /* Flags for current reception */
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short sc_rcount; /* Number of bits received so far */
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int sc_bits; /* Bits received so far */
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u_char sc_pkt[3]; /* Packet not yet transmitted */
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short sc_pktsize; /* How many bytes in the packet? */
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u_char sc_buf[TW_SIZE]; /* We buffer our own input */
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int sc_nextin; /* Next free slot in circular buffer */
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int sc_nextout; /* First used slot in circular buffer */
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#ifdef HIRESTIME
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int sc_xtimes[22]; /* Times for bits in current xmit packet */
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int sc_rtimes[22]; /* Times for bits in current rcv packet */
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#endif /* HIRESTIME */
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#ifdef DEVFS
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void *devfs_token; /* store the devfs handle */
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#endif
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} tw_sc[NTW];
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static void twdelay25(void);
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static void twdelayn(int n);
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static void twsetuptimes(int *a);
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static int wait_for_zero(struct tw_sc *sc);
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static int twgetbytes(struct tw_sc *sc, u_char *p, int cnt);
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static void twabortrcv(struct tw_sc *sc);
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static int twsend(struct tw_sc *sc, int h, int k, int cnt);
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static int next_zero(struct tw_sc *sc);
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static int twputpkt(struct tw_sc *sc, u_char *p);
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static int twchecktime(int target, int tol);
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/*
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* Counter value for delay loop.
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* It is adjusted by twprobe so that the delay loop takes about 25us.
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*/
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#define TWDELAYCOUNT 161 /* Works on my 486DX/33 */
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static int twdelaycount;
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/*
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* Twdelay25 is used for very short delays of about 25us.
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* It is implemented with a calibrated delay loop, and should be
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* fairly accurate ... unless we are preempted by an interrupt.
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*
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* We use this to wait for zero crossings because the X-10 specs say we
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* are supposed to assert carrier within 25us when one happens.
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* I don't really believe we can do this, but the X-10 devices seem to be
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* fairly forgiving.
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*/
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static void twdelay25()
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{
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int cnt;
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for(cnt = twdelaycount; cnt; cnt--); /* Should take about 25us */
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}
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/*
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* Twdelayn is used to time the length of the 1ms carrier pulse.
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* This is not very critical, but if we have high-resolution time-of-day
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* we check it every apparent 200us to make sure we don't get too far off
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* if we happen to be interrupted during the delay.
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*/
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static void twdelayn(int n)
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{
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#ifdef HIRESTIME
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int t, d;
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struct timeval tv;
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microtime(&tv);
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t = tv.tv_usec;
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t += n;
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#endif /* HIRESTIME */
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while(n > 0) {
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twdelay25();
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n -= 25;
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#ifdef HIRESTIME
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if((n & 0x7) == 0) {
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microtime(&tv);
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d = tv.tv_usec - t;
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if(d >= 0 && d < 1000000) return;
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}
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#endif /* HIRESTIME */
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}
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}
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static int
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twprobe(idp)
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struct isa_device *idp;
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{
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struct tw_sc sc;
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int d;
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int tries;
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sc.sc_port = idp->id_iobase;
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/*
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* Iteratively check the timing of a few sync transitions, and adjust
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* the loop delay counter, if necessary, to bring the timing reported
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* by wait_for_zero() close to HALFCYCLE. Give up if anything
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* ridiculous happens.
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*/
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if(twdelaycount == 0) { /* Only adjust timing for first unit */
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twdelaycount = TWDELAYCOUNT;
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for(tries = 0; tries < 10; tries++) {
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sc.sc_xphase = inb(idp->id_iobase + tw_control) & TWC_SYNC;
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if(wait_for_zero(&sc) >= 0) {
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d = wait_for_zero(&sc);
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if(d <= HALFCYCLE/100 || d >= HALFCYCLE*100) {
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twdelaycount = 0;
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return(0);
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}
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twdelaycount = (twdelaycount * d)/HALFCYCLE;
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}
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}
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}
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/*
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* Now do a final check, just to make sure
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*/
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sc.sc_xphase = inb(idp->id_iobase + tw_control) & TWC_SYNC;
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if(wait_for_zero(&sc) >= 0) {
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d = wait_for_zero(&sc);
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if(d <= (HALFCYCLE * 110)/100 && d >= (HALFCYCLE * 90)/100) return(1);
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}
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return(0);
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}
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static int
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twattach(idp)
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struct isa_device *idp;
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{
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struct tw_sc *sc;
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int unit;
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sc = &tw_sc[unit = idp->id_unit];
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sc->sc_port = idp->id_iobase;
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sc->sc_state = 0;
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#ifdef DEVFS
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sc->devfs_token =
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devfs_add_devswf(&tw_cdevsw, unit, DV_CHR, 0, 0,
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0600, "tw%d", unit);
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#endif
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return (1);
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}
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int twopen(dev, flag, mode, p)
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dev_t dev;
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int flag;
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int mode;
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struct proc *p;
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{
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struct tw_sc *sc = &tw_sc[TWUNIT(dev)];
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int s;
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s = spltty();
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if(sc->sc_state == 0) {
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sc->sc_state = TWS_OPEN;
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sc->sc_nextin = sc->sc_nextout = 0;
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sc->sc_pktsize = 0;
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outb(sc->sc_port+tw_control, TWC_ENA);
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}
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splx(s);
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return(0);
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}
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int twclose(dev, flag, mode, p)
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dev_t dev;
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int flag;
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int mode;
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struct proc *p;
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{
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struct tw_sc *sc = &tw_sc[TWUNIT(dev)];
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int s;
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s = spltty();
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sc->sc_state = 0;
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outb(sc->sc_port+tw_control, 0);
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splx(s);
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return(0);
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}
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int twread(dev, uio, ioflag)
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dev_t dev;
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struct uio *uio;
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int ioflag;
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{
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u_char buf[3];
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struct tw_sc *sc = &tw_sc[TWUNIT(dev)];
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int error, cnt, s;
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s = spltty();
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cnt = MIN(uio->uio_resid, 3);
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if((error = twgetbytes(sc, buf, cnt)) == 0) {
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error = uiomove(buf, cnt, uio);
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}
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splx(s);
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return(error);
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}
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int twwrite(dev, uio, ioflag)
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dev_t dev;
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struct uio *uio;
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int ioflag;
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{
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struct tw_sc *sc;
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int house, key, reps;
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int s, error;
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int cnt;
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sc = &tw_sc[TWUNIT(dev)];
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/*
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* Note: Although I had intended to allow concurrent transmitters,
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* there is a potential problem here if two processes both write
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* into the sc_pkt buffer at the same time. The following code
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* is an additional critical section that needs to be synchronized.
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*/
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s = spltty();
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cnt = MIN(3 - sc->sc_pktsize, uio->uio_resid);
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if(error = uiomove(&(sc->sc_pkt[sc->sc_pktsize]), cnt, uio)) {
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splx(s);
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return(error);
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}
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sc->sc_pktsize += cnt;
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if(sc->sc_pktsize < 3) { /* Only transmit 3-byte packets */
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splx(s);
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return(0);
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}
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sc->sc_pktsize = 0;
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/*
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* Collect house code, key code, and rep count, and check for sanity.
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*/
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house = sc->sc_pkt[0];
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key = sc->sc_pkt[1];
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reps = sc->sc_pkt[2];
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if(house >= 16 || key >= 32) {
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splx(s);
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return(ENODEV);
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}
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/*
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* Synchronize with the receiver operating in the bottom half, and
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* also with concurrent transmitters.
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* We don't want to interfere with a packet currently being received,
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* and we would like the receiver to recognize when a packet has
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* originated locally.
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*/
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while(sc->sc_state & (TWS_RCVING | TWS_XMITTING)) {
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if(error = tsleep((caddr_t)sc, TWPRI|PCATCH, "twwrite", 0)) {
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splx(s);
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return(error);
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}
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}
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sc->sc_state |= TWS_XMITTING;
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/*
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* Everything looks OK, let's do the transmission.
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*/
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splx(s); /* Enable interrupts because this takes a LONG time */
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error = twsend(sc, house, key, reps);
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s = spltty();
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sc->sc_state &= ~TWS_XMITTING;
|
|
wakeup((caddr_t)sc);
|
|
splx(s);
|
|
if(error) return(EIO);
|
|
else return(0);
|
|
}
|
|
|
|
/*
|
|
* Determine if there is data available for reading
|
|
*/
|
|
|
|
int twselect(dev, rw, p)
|
|
dev_t dev;
|
|
int rw;
|
|
struct proc *p;
|
|
{
|
|
struct tw_sc *sc;
|
|
int s;
|
|
|
|
sc = &tw_sc[TWUNIT(dev)];
|
|
s = spltty();
|
|
if(sc->sc_nextin != sc->sc_nextout) {
|
|
splx(s);
|
|
return(1);
|
|
}
|
|
selrecord(p, &sc->sc_selp);
|
|
splx(s);
|
|
return(0);
|
|
}
|
|
|
|
/*
|
|
* X-10 Protocol
|
|
*/
|
|
|
|
#define X10_START_LENGTH 4
|
|
static char X10_START[] = { 1, 1, 1, 0 };
|
|
|
|
/*
|
|
* Each bit of the 4-bit house code and 5-bit key code
|
|
* is transmitted twice, once in true form, and then in
|
|
* complemented form. This is already taken into account
|
|
* in the following tables.
|
|
*/
|
|
|
|
#define X10_HOUSE_LENGTH 8
|
|
static char X10_HOUSE[16][8] = {
|
|
0, 1, 1, 0, 1, 0, 0, 1, /* A = 0110 */
|
|
1, 0, 1, 0, 1, 0, 0, 1, /* B = 1110 */
|
|
0, 1, 0, 1, 1, 0, 0, 1, /* C = 0010 */
|
|
1, 0, 0, 1, 1, 0, 0, 1, /* D = 1010 */
|
|
0, 1, 0, 1, 0, 1, 1, 0, /* E = 0001 */
|
|
1, 0, 0, 1, 0, 1, 1, 0, /* F = 1001 */
|
|
0, 1, 1, 0, 0, 1, 1, 0, /* G = 0101 */
|
|
1, 0, 1, 0, 0, 1, 1, 0, /* H = 1101 */
|
|
0, 1, 1, 0, 1, 0, 1, 0, /* I = 0111 */
|
|
1, 0, 1, 0, 1, 0, 1, 0, /* J = 1111 */
|
|
0, 1, 0, 1, 1, 0, 1, 0, /* K = 0011 */
|
|
1, 0, 0, 1, 1, 0, 1, 0, /* L = 1011 */
|
|
0, 1, 0, 1, 0, 1, 0, 1, /* M = 0000 */
|
|
1, 0, 0, 1, 0, 1, 0, 1, /* N = 1000 */
|
|
0, 1, 1, 0, 0, 1, 0, 1, /* O = 0100 */
|
|
1, 0, 1, 0, 0, 1, 0, 1 /* P = 1100 */
|
|
};
|
|
|
|
#define X10_KEY_LENGTH 10
|
|
static char X10_KEY[32][10] = {
|
|
0, 1, 1, 0, 1, 0, 0, 1, 0, 1, /* 01100 => 1 */
|
|
1, 0, 1, 0, 1, 0, 0, 1, 0, 1, /* 11100 => 2 */
|
|
0, 1, 0, 1, 1, 0, 0, 1, 0, 1, /* 00100 => 3 */
|
|
1, 0, 0, 1, 1, 0, 0, 1, 0, 1, /* 10100 => 4 */
|
|
0, 1, 0, 1, 0, 1, 1, 0, 0, 1, /* 00010 => 5 */
|
|
1, 0, 0, 1, 0, 1, 1, 0, 0, 1, /* 10010 => 6 */
|
|
0, 1, 1, 0, 0, 1, 1, 0, 0, 1, /* 01010 => 7 */
|
|
1, 0, 1, 0, 0, 1, 1, 0, 0, 1, /* 11010 => 8 */
|
|
0, 1, 1, 0, 1, 0, 1, 0, 0, 1, /* 01110 => 9 */
|
|
1, 0, 1, 0, 1, 0, 1, 0, 0, 1, /* 11110 => 10 */
|
|
0, 1, 0, 1, 1, 0, 1, 0, 0, 1, /* 00110 => 11 */
|
|
1, 0, 0, 1, 1, 0, 1, 0, 0, 1, /* 10110 => 12 */
|
|
0, 1, 0, 1, 0, 1, 0, 1, 0, 1, /* 00000 => 13 */
|
|
1, 0, 0, 1, 0, 1, 0, 1, 0, 1, /* 10000 => 14 */
|
|
0, 1, 1, 0, 0, 1, 0, 1, 0, 1, /* 01000 => 15 */
|
|
1, 0, 1, 0, 0, 1, 0, 1, 0, 1, /* 11000 => 16 */
|
|
0, 1, 0, 1, 0, 1, 0, 1, 1, 0, /* 00001 => All Units Off */
|
|
0, 1, 0, 1, 0, 1, 1, 0, 1, 0, /* 00011 => All Units On */
|
|
0, 1, 0, 1, 1, 0, 0, 1, 1, 0, /* 00101 => On */
|
|
0, 1, 0, 1, 1, 0, 1, 0, 1, 0, /* 00111 => Off */
|
|
0, 1, 1, 0, 0, 1, 0, 1, 1, 0, /* 01001 => Dim */
|
|
0, 1, 1, 0, 0, 1, 1, 0, 1, 0, /* 01011 => Bright */
|
|
0, 1, 1, 0, 1, 0, 0, 1, 1, 0, /* 01101 => All LIGHTS Off */
|
|
0, 1, 1, 0, 1, 0, 1, 0, 1, 0, /* 01111 => Extended Code */
|
|
1, 0, 0, 1, 0, 1, 0, 1, 1, 0, /* 10001 => Hail Request */
|
|
1, 0, 0, 1, 0, 1, 1, 0, 1, 0, /* 10011 => Hail Acknowledge */
|
|
1, 0, 0, 1, 1, 0, 0, 1, 1, 0, /* 10101 => Preset Dim 0 */
|
|
1, 0, 0, 1, 1, 0, 1, 0, 1, 0, /* 10111 => Preset Dim 1 */
|
|
1, 0, 1, 0, 0, 1, 0, 1, 0, 1, /* 11000 => Extended Data (analog) */
|
|
1, 0, 1, 0, 0, 1, 1, 0, 1, 0, /* 11011 => Status = on */
|
|
1, 0, 1, 0, 1, 0, 0, 1, 1, 0, /* 11101 => Status = off */
|
|
1, 0, 1, 0, 1, 0, 1, 0, 1, 0 /* 11111 => Status request */
|
|
};
|
|
|
|
/*
|
|
* Tables for mapping received X-10 code back to house/key number.
|
|
*/
|
|
|
|
static short X10_HOUSE_INV[16] = {
|
|
12, 4, 2, 10, 14, 6, 0, 8,
|
|
13, 5, 3, 11, 15, 7, 1, 9
|
|
};
|
|
|
|
static short X10_KEY_INV[32] = {
|
|
12, 16, 4, 17, 2, 18, 10, 19,
|
|
14, 20, 6, 21, 0, 22, 8, 23,
|
|
13, 24, 5, 25, 3, 26, 11, 27,
|
|
15, 28, 7, 29, 1, 30, 9, 31
|
|
};
|
|
|
|
/*
|
|
* Transmit a packet containing house code h and key code k
|
|
*/
|
|
|
|
#define TWRETRY 10 /* Try 10 times to sync with AC line */
|
|
|
|
static int
|
|
twsend(sc, h, k, cnt)
|
|
struct tw_sc *sc;
|
|
int h, k, cnt;
|
|
{
|
|
int i;
|
|
int port = sc->sc_port;
|
|
|
|
/*
|
|
* Make sure we get a reliable sync with a power line zero crossing
|
|
*/
|
|
for(i = 0; i < TWRETRY; i++) {
|
|
if(wait_for_zero(sc) > 100) goto insync;
|
|
}
|
|
log(LOG_ERR, "TWXMIT: failed to sync.\n");
|
|
return(-1);
|
|
|
|
insync:
|
|
/*
|
|
* Be sure to leave 3 cycles space between transmissions
|
|
*/
|
|
for(i = 6; i > 0; i--)
|
|
if(next_zero(sc) < 0) return(-1);
|
|
/*
|
|
* The packet is transmitted cnt times, with no gaps.
|
|
*/
|
|
while(cnt--) {
|
|
/*
|
|
* Transmit the start code
|
|
*/
|
|
for(i = 0; i < X10_START_LENGTH; i++) {
|
|
outb(port+tw_data, X10_START[i] ? 0xff : 0x00); /* Waste no time! */
|
|
#ifdef HIRESTIME
|
|
if(i == 0) twsetuptimes(sc->sc_xtimes);
|
|
if(twchecktime(sc->sc_xtimes[i], HALFCYCLE/20) == 0) {
|
|
outb(port+tw_data, 0);
|
|
return(-1);
|
|
}
|
|
#endif /* HIRESTIME */
|
|
twdelayn(1000); /* 1ms pulse width */
|
|
outb(port+tw_data, 0);
|
|
if(next_zero(sc) < 0) return(-1);
|
|
}
|
|
/*
|
|
* Transmit the house code
|
|
*/
|
|
for(i = 0; i < X10_HOUSE_LENGTH; i++) {
|
|
outb(port+tw_data, X10_HOUSE[h][i] ? 0xff : 0x00); /* Waste no time! */
|
|
#ifdef HIRESTIME
|
|
if(twchecktime(sc->sc_xtimes[i+X10_START_LENGTH], HALFCYCLE/20) == 0) {
|
|
outb(port+tw_data, 0);
|
|
return(-1);
|
|
}
|
|
#endif /* HIRESTIME */
|
|
twdelayn(1000); /* 1ms pulse width */
|
|
outb(port+tw_data, 0);
|
|
if(next_zero(sc) < 0) return(-1);
|
|
}
|
|
/*
|
|
* Transmit the unit/key code
|
|
*/
|
|
for(i = 0; i < X10_KEY_LENGTH; i++) {
|
|
outb(port+tw_data, X10_KEY[k][i] ? 0xff : 0x00);
|
|
#ifdef HIRESTIME
|
|
if(twchecktime(sc->sc_xtimes[i+X10_START_LENGTH+X10_HOUSE_LENGTH],
|
|
HALFCYCLE/20) == 0) {
|
|
outb(port+tw_data, 0);
|
|
return(-1);
|
|
}
|
|
#endif /* HIRESTIME */
|
|
twdelayn(1000); /* 1ms pulse width */
|
|
outb(port+tw_data, 0);
|
|
if(next_zero(sc) < 0) return(-1);
|
|
}
|
|
}
|
|
return(0);
|
|
}
|
|
|
|
/*
|
|
* Waste CPU cycles to get in sync with a power line zero crossing.
|
|
* The value returned is roughly how many microseconds we wasted before
|
|
* seeing the transition. To avoid wasting time forever, we give up after
|
|
* waiting patiently for 1/4 sec (15 power line cycles at 60 Hz),
|
|
* which is more than the 11 cycles it takes to transmit a full
|
|
* X-10 packet.
|
|
*/
|
|
|
|
static int wait_for_zero(sc)
|
|
struct tw_sc *sc;
|
|
{
|
|
int i, old, new, max;
|
|
int port = sc->sc_port + tw_control;
|
|
|
|
old = sc->sc_xphase;
|
|
max = 10000; /* 10000 * 25us = 0.25 sec */
|
|
i = 0;
|
|
while(max--) {
|
|
new = inb(port) & TWC_SYNC;
|
|
if(new != old) {
|
|
sc->sc_xphase = new;
|
|
return(i*25);
|
|
}
|
|
i++;
|
|
twdelay25();
|
|
}
|
|
return(-1);
|
|
}
|
|
|
|
/*
|
|
* Wait for the next zero crossing transition, and if we don't have
|
|
* high-resolution time-of-day, check to see that the zero crossing
|
|
* appears to be arriving on schedule.
|
|
* We expect to be waiting almost a full half-cycle (8.333ms-1ms = 7.333ms).
|
|
* If we don't seem to wait very long, something is wrong (like we got
|
|
* preempted!) and we should abort the transmission because
|
|
* there's no telling how long it's really been since the
|
|
* last bit was transmitted.
|
|
*/
|
|
|
|
static int next_zero(sc)
|
|
struct tw_sc *sc;
|
|
{
|
|
int d;
|
|
#ifdef HIRESTIME
|
|
if((d = wait_for_zero(sc)) < 0) {
|
|
#else
|
|
if((d = wait_for_zero(sc)) < 6000 || d > 8500) {
|
|
/* No less than 6.0ms, no more than 8.5ms */
|
|
#endif /* HIRESTIME */
|
|
log(LOG_ERR, "TWXMIT framing error: %d\n", d);
|
|
return(-1);
|
|
}
|
|
return(0);
|
|
}
|
|
|
|
/*
|
|
* Put a three-byte packet into the circular buffer
|
|
* Should be called at priority spltty()
|
|
*/
|
|
|
|
static int twputpkt(sc, p)
|
|
struct tw_sc *sc;
|
|
u_char *p;
|
|
{
|
|
int i, next;
|
|
|
|
for(i = 0; i < 3; i++) {
|
|
next = sc->sc_nextin+1;
|
|
if(next >= TW_SIZE) next = 0;
|
|
if(next == sc->sc_nextout) { /* Buffer full */
|
|
/*
|
|
log(LOG_ERR, "TWRCV: Buffer overrun\n");
|
|
*/
|
|
return(1);
|
|
}
|
|
sc->sc_buf[sc->sc_nextin] = *p++;
|
|
sc->sc_nextin = next;
|
|
}
|
|
if(sc->sc_state & TWS_WANT) {
|
|
sc->sc_state &= ~TWS_WANT;
|
|
wakeup((caddr_t)(&sc->sc_buf));
|
|
}
|
|
selwakeup(&sc->sc_selp);
|
|
return(0);
|
|
}
|
|
|
|
/*
|
|
* Get bytes from the circular buffer
|
|
* Should be called at priority spltty()
|
|
*/
|
|
|
|
static int twgetbytes(sc, p, cnt)
|
|
struct tw_sc *sc;
|
|
u_char *p;
|
|
int cnt;
|
|
{
|
|
int error;
|
|
|
|
while(cnt--) {
|
|
while(sc->sc_nextin == sc->sc_nextout) { /* Buffer empty */
|
|
sc->sc_state |= TWS_WANT;
|
|
if(error = tsleep((caddr_t)(&sc->sc_buf), TWPRI|PCATCH, "twread", 0)) {
|
|
return(error);
|
|
}
|
|
}
|
|
*p++ = sc->sc_buf[sc->sc_nextout++];
|
|
if(sc->sc_nextout >= TW_SIZE) sc->sc_nextout = 0;
|
|
}
|
|
return(0);
|
|
}
|
|
|
|
/*
|
|
* Abort reception that has failed to complete in the required time.
|
|
*/
|
|
|
|
static void
|
|
twabortrcv(sc)
|
|
struct tw_sc *sc;
|
|
{
|
|
int s;
|
|
u_char pkt[3];
|
|
|
|
s = spltty();
|
|
sc->sc_state &= ~TWS_RCVING;
|
|
sc->sc_flags |= TW_RCV_ERROR;
|
|
pkt[0] = sc->sc_flags;
|
|
pkt[1] = pkt[2] = 0;
|
|
twputpkt(sc, pkt);
|
|
log(LOG_ERR, "TWRCV: aborting (%x, %d)\n", sc->sc_bits, sc->sc_rcount);
|
|
wakeup((caddr_t)sc);
|
|
splx(s);
|
|
}
|
|
|
|
/*
|
|
* This routine handles interrupts that occur when there is a falling
|
|
* transition on the RX input. There isn't going to be a transition
|
|
* on every bit (some are zero), but if we are smart and keep track of
|
|
* how long it's been since the last interrupt (via the zero crossing
|
|
* detect line and/or high-resolution time-of-day routine), we can
|
|
* reconstruct the transmission without having to poll.
|
|
*/
|
|
|
|
void twintr(unit)
|
|
int unit;
|
|
{
|
|
struct tw_sc *sc = &tw_sc[unit];
|
|
int port;
|
|
int newphase;
|
|
u_char pkt[3];
|
|
|
|
port = sc->sc_port;
|
|
/*
|
|
* Ignore any interrupts that occur if the device is not open.
|
|
*/
|
|
if(sc->sc_state == 0) return;
|
|
newphase = inb(port + tw_control) & TWC_SYNC;
|
|
/*
|
|
* NEW PACKET:
|
|
* If we aren't currently receiving a packet, set up a new packet
|
|
* and put in the first "1" bit that has just arrived.
|
|
* Arrange for the reception to be aborted if too much time goes by.
|
|
*/
|
|
if((sc->sc_state & TWS_RCVING) == 0) {
|
|
#ifdef HIRESTIME
|
|
twsetuptimes(sc->sc_rtimes);
|
|
#endif /* HIRESTIME */
|
|
sc->sc_state |= TWS_RCVING;
|
|
sc->sc_rcount = 1;
|
|
if(sc->sc_state & TWS_XMITTING) sc->sc_flags = TW_RCV_LOCAL;
|
|
else sc->sc_flags = 0;
|
|
sc->sc_bits = 0;
|
|
sc->sc_rphase = newphase;
|
|
timeout((timeout_func_t)twabortrcv, (caddr_t)sc, hz/4);
|
|
return;
|
|
}
|
|
/*
|
|
* START CODE:
|
|
* The second and third bits are a special case.
|
|
*/
|
|
if(sc->sc_rcount < 3) {
|
|
#ifdef HIRESTIME
|
|
if(twchecktime(sc->sc_rtimes[sc->sc_rcount], HALFCYCLE/3)
|
|
&& newphase != sc->sc_rphase) {
|
|
#else
|
|
if(newphase != sc->sc_rphase) {
|
|
#endif
|
|
sc->sc_rcount++;
|
|
} else {
|
|
/*
|
|
* Invalid start code -- abort reception.
|
|
*/
|
|
sc->sc_state &= ~TWS_RCVING;
|
|
sc->sc_flags |= TW_RCV_ERROR;
|
|
/*
|
|
pkt[0] = sc->sc_flags;
|
|
pkt[1] = pkt[2] = 0;
|
|
twputpkt(sc, pkt);
|
|
wakeup((caddr_t)sc);
|
|
*/
|
|
untimeout((timeout_func_t)twabortrcv, (caddr_t)sc);
|
|
log(LOG_ERR, "TWRCV: Invalid start code\n");
|
|
return;
|
|
}
|
|
if(sc->sc_rcount == 3) {
|
|
/*
|
|
* We've gotten three "1" bits in a row. The start code
|
|
* is really 1110, but this might be followed by a zero
|
|
* bit from the house code, so if we wait any longer we
|
|
* might be confused about the first house code bit.
|
|
* So, we guess that the start code is correct and insert
|
|
* the trailing zero without actually having seen it.
|
|
* We don't change sc_rphase in this case, because two
|
|
* bit arrivals in a row preserve parity.
|
|
*/
|
|
sc->sc_rcount++;
|
|
return;
|
|
}
|
|
/*
|
|
* Update sc_rphase to the current phase before returning.
|
|
*/
|
|
sc->sc_rphase = newphase;
|
|
return;
|
|
}
|
|
/*
|
|
* GENERAL CASE:
|
|
* Now figure out what the current bit is that just arrived.
|
|
* The X-10 protocol transmits each data bit twice: once in
|
|
* true form and once in complemented form on the next half
|
|
* cycle. So, there will be at least one interrupt per bit.
|
|
* By comparing the phase we see at the time of the interrupt
|
|
* with the saved sc_rphase, we can tell on which half cycle
|
|
* the interrupt occrred. This assumes, of course, that the
|
|
* packet is well-formed. We do the best we can at trying to
|
|
* catch errors by aborting if too much time has gone by, and
|
|
* by tossing out a packet if too many bits arrive, but the
|
|
* whole scheme is probably not as robust as if we had a nice
|
|
* interrupt on every half cycle of the power line.
|
|
* If we have high-resolution time-of-day routines, then we
|
|
* can do a bit more sanity checking.
|
|
*/
|
|
|
|
/*
|
|
* A complete packet is 22 half cycles.
|
|
*/
|
|
if(sc->sc_rcount <= 20) {
|
|
#ifdef HIRESTIME
|
|
if((newphase == sc->sc_rphase &&
|
|
twchecktime(sc->sc_rtimes[sc->sc_rcount+1], HALFCYCLE/3) == 0)
|
|
|| (newphase != sc->sc_rphase &&
|
|
twchecktime(sc->sc_rtimes[sc->sc_rcount], HALFCYCLE/3) == 0)) {
|
|
sc->sc_flags |= TW_RCV_ERROR;
|
|
} else {
|
|
#endif /* HIRESTIME */
|
|
sc->sc_bits = (sc->sc_bits << 1)
|
|
| ((newphase == sc->sc_rphase) ? 0x0 : 0x1);
|
|
sc->sc_rcount += 2;
|
|
#ifdef HIRESTIME
|
|
}
|
|
#endif /* HIRESTIME */
|
|
}
|
|
if(sc->sc_rcount >= 22 || sc->sc_flags & TW_RCV_ERROR) {
|
|
if(sc->sc_rcount != 22) {
|
|
sc->sc_flags |= TW_RCV_ERROR;
|
|
pkt[0] = sc->sc_flags;
|
|
pkt[1] = pkt[2] = 0;
|
|
} else {
|
|
pkt[0] = sc->sc_flags;
|
|
pkt[1] = X10_HOUSE_INV[(sc->sc_bits & 0x1e0) >> 5];
|
|
pkt[2] = X10_KEY_INV[sc->sc_bits & 0x1f];
|
|
}
|
|
sc->sc_state &= ~TWS_RCVING;
|
|
twputpkt(sc, pkt);
|
|
untimeout((timeout_func_t)twabortrcv, (caddr_t)sc);
|
|
if(sc->sc_flags & TW_RCV_ERROR)
|
|
log(LOG_ERR, "TWRCV: invalid packet: (%d, %x)\n",
|
|
sc->sc_rcount, sc->sc_bits);
|
|
wakeup((caddr_t)sc);
|
|
}
|
|
}
|
|
|
|
#ifdef HIRESTIME
|
|
/*
|
|
* Initialize an array of 22 times, starting from the current
|
|
* microtime and continuing for the next 21 half cycles.
|
|
* We use the times as a reference to make sure transmission
|
|
* or reception is on schedule.
|
|
*/
|
|
|
|
static void twsetuptimes(int *a)
|
|
{
|
|
struct timeval tv;
|
|
int i, t;
|
|
|
|
microtime(&tv);
|
|
t = tv.tv_usec;
|
|
for(i = 0; i < 22; i++) {
|
|
*a++ = t;
|
|
t += HALFCYCLE;
|
|
if(t >= 1000000) t -= 1000000;
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Check the current time against a slot in a previously set up
|
|
* timing array, and make sure that it looks like we are still
|
|
* on schedule.
|
|
*/
|
|
|
|
static int twchecktime(int target, int tol)
|
|
{
|
|
struct timeval tv;
|
|
int t, d;
|
|
|
|
microtime(&tv);
|
|
t = tv.tv_usec;
|
|
d = (target - t) >= 0 ? (target - t) : (t - target);
|
|
if(d > 500000) d = 1000000-d;
|
|
if(d <= tol && d >= -tol) {
|
|
return(1);
|
|
} else {
|
|
log(LOG_ERR, "TWCHK: timing off by %dus (>= %dus)\n", d, tol);
|
|
return(0);
|
|
}
|
|
}
|
|
#endif /* HIRESTIME */
|
|
|
|
|
|
static tw_devsw_installed = 0;
|
|
|
|
static void tw_drvinit(void *unused)
|
|
{
|
|
dev_t dev;
|
|
|
|
if( ! tw_devsw_installed ) {
|
|
dev = makedev(CDEV_MAJOR, 0);
|
|
cdevsw_add(&dev,&tw_cdevsw, NULL);
|
|
tw_devsw_installed = 1;
|
|
}
|
|
}
|
|
|
|
SYSINIT(twdev,SI_SUB_DRIVERS,SI_ORDER_MIDDLE+CDEV_MAJOR,tw_drvinit,NULL)
|
|
|
|
|
|
#endif NTW
|