161fedb9cc
By Richard Earnshaw at ARM > >GCC has for a number of years provides a set of pre-defined macros for >use with determining the ISA and features of the target during >pre-processing. However, the design was always somewhat cumbersome in >that each new architecture revision created a new define and then >removed the previous one. This meant that it was necessary to keep >updating the support code simply to recognise a new architecture being >added. > >The ACLE specification (ARM C Language Extentions) >(http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.set.swdev/index.html) >provides a much more suitable interface and GCC has supported this >since gcc-4.8. > >This patch makes use of the ACLE pre-defines to map to the internal >feature definitions. To support older versions of GCC a compatibility >header is provided that maps the traditional pre-defines onto the new >ACLE ones. Stop using __FreeBSD_ARCH_armv6__ and switch to __ARM_ARCH >= 6 in the couple of places in tree. clang already implements ACLE. Add a define that says we implement version 1.1, even though the implementation isn't quite complete.
186 lines
5.4 KiB
C
186 lines
5.4 KiB
C
/*
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* Copyright (c) 2014 ARM Ltd
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the company may not be used to endorse or promote
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* products derived from this software without specific prior written
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* permission.
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*
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* THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
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* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef __ARM_ARCH
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/* ACLE standardises a set of pre-defines that describe the ARM architecture.
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These were mostly implemented in GCC around GCC-4.8; older versions
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have no, or only partial support. To provide a level of backwards
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compatibility we try to work out what the definitions should be, given
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the older pre-defines that GCC did produce. This isn't complete, but
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it should be enough for use by routines that depend on this header. */
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/* No need to handle ARMv8, GCC had ACLE support before that. */
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#define __ARM_ACLE 101
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# ifdef __ARM_ARCH_7__
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/* The common subset of ARMv7 in all profiles. */
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# define __ARM_ARCH 7
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# define __ARM_ARCH_ISA_THUMB 2
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# define __ARM_FEATURE_CLZ
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# define __ARM_FEATURE_LDREX 7
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# define __ARM_FEATURE_UNALIGNED
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# endif
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# if defined (__ARM_ARCH_7A__) || defined (__ARM_ARCH_7R__)
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# define __ARM_ARCH 7
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# define __ARM_ARCH_ISA_THUMB 2
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# define __ARM_ARCH_ISA_ARM
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# define __ARM_FEATURE_CLZ
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# define __ARM_FEATURE_SIMD32
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# define __ARM_FEATURE_DSP
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# define __ARM_FEATURE_QBIT
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# define __ARM_FEATURE_SAT
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# define __ARM_FEATURE_LDREX 15
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# define __ARM_FEATURE_UNALIGNED
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# ifdef __ARM_ARCH_7A__
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# define __ARM_ARCH_PROFILE 'A'
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# else
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# define __ARM_ARCH_PROFILE 'R'
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# endif
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# endif
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# ifdef __ARM_ARCH_7EM__
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# define __ARM_ARCH 7
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# define __ARM_ARCH_ISA_THUMB 2
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# define __ARM_FEATURE_CLZ
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# define __ARM_FEATURE_SIMD32
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# define __ARM_FEATURE_DSP
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# define __ARM_FEATURE_QBIT
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# define __ARM_FEATURE_SAT
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# define __ARM_FEATURE_LDREX 7
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# define __ARM_FEATURE_UNALIGNED
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# define __ARM_ARCH_PROFILE 'M'
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# endif
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# ifdef __ARM_ARCH_7M__
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# define __ARM_ARCH 7
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# define __ARM_ARCH_ISA_THUMB 2
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# define __ARM_FEATURE_CLZ
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# define __ARM_FEATURE_QBIT
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# define __ARM_FEATURE_SAT
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# define __ARM_FEATURE_LDREX 7
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# define __ARM_FEATURE_UNALIGNED
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# define __ARM_ARCH_PROFILE 'M'
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# endif
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# ifdef __ARM_ARCH_6T2__
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# define __ARM_ARCH 6
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# define __ARM_ARCH_ISA_THUMB 2
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# define __ARM_ARCH_ISA_ARM
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# define __ARM_FEATURE_CLZ
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# define __ARM_FEATURE_SIMD32
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# define __ARM_FEATURE_DSP
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# define __ARM_FEATURE_QBIT
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# define __ARM_FEATURE_SAT
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# define __ARM_FEATURE_LDREX 4
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# define __ARM_FEATURE_UNALIGNED
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# endif
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# ifdef __ARM_ARCH_6M__
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# define __ARM_ARCH 6
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# define __ARM_ARCH_ISA_THUMB 1
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# define __ARM_ARCH_PROFILE 'M'
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# endif
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# if defined (__ARM_ARCH_6__) || defined (__ARM_ARCH_6J__) \
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|| defined (__ARM_ARCH_6K__) || defined (__ARM_ARCH_6Z__) \
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|| defined (__ARM_ARCH_6ZK__)
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# define __ARM_ARCH 6
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# define __ARM_ARCH_ISA_THUMB 1
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# define __ARM_ARCH_ISA_ARM
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# define __ARM_FEATURE_CLZ
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# define __ARM_FEATURE_SIMD32
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# define __ARM_FEATURE_DSP
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# define __ARM_FEATURE_QBIT
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# define __ARM_FEATURE_SAT
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# define __ARM_FEATURE_UNALIGNED
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# ifndef __thumb__
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# if defined (__ARM_ARCH_6K__) || defined (__ARM_ARCH_6ZK__)
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# define __ARM_FEATURE_LDREX 15
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# else
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# define __ARM_FEATURE_LDREX 4
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# endif
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# endif
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# endif
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# if defined (__ARM_ARCH_5TE__) || defined (__ARM_ARCH_5E__)
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# define __ARM_ARCH 5
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# define __ARM_ARCH_ISA_ARM
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# ifdef __ARM_ARCH_5TE__
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# define __ARM_ARCH_ISA_THUMB 1
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# endif
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# define __ARM_FEATURE_CLZ
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# define __ARM_FEATURE_DSP
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# endif
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# if defined (__ARM_ARCH_5T__) || defined (__ARM_ARCH_5__)
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# define __ARM_ARCH 5
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# define __ARM_ARCH_ISA_ARM
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# ifdef __ARM_ARCH_5TE__
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# define __ARM_ARCH_ISA_THUMB 1
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# endif
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# define __ARM_FEATURE_CLZ
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# endif
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# ifdef __ARM_ARCH_4T__
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# define __ARM_ARCH 4
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# define __ARM_ARCH_ISA_ARM
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# define __ARM_ARCH_ISA_THUMB 1
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# endif
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# ifdef __ARM_ARCH_4__
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# define __ARM_ARCH 4
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# define __ARM_ARCH_ISA_ARM
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# endif
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# if defined (__ARM_ARCH_3__) || defined (__ARM_ARCH_3M__)
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# define __ARM_ARCH 3
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# define __ARM_ARCH_ISA_ARM
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# endif
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# ifdef __ARM_ARCH_2__
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# define __ARM_ARCH 2
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# define __ARM_ARCH_ISA_ARM
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# endif
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# ifdef __ARMEB__
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# define __ARM_BIG_ENDIAN
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# endif
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/* If we still don't know what the target architecture is, then we're
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probably not using GCC. */
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# ifndef __ARM_ARCH
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# error Unable to determine architecture version.
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# endif
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#endif /* __ARM_ARCH */
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