mmel a0d10caff7 EHCI: Make core reset and port speed reading more generic. ... Use driver settable callbacks for handling of: - core post reset - reading actual port speed Typically, OTG enabled EHCI cores wants setting of USBMODE register, but this register is not defined in EHCI specification and different cores can have it on different offset. Also, for cores with TT extension, actual port speed must be determinable. But again, EHCI specification not covers this so this patch provides function for two most common variant of speed bits layout. Reviewed by: hselasky Differential Revision: https://reviews.freebsd.org/D5088		2016-01-28 14:11:59 +00:00
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ehci_ps3.c	EHCI: Make core reset and port speed reading more generic.	2016-01-28 14:11:59 +00:00
if_glc.c	Mechanically convert to if_inc_counter().	2014-09-19 09:20:34 +00:00
if_glcreg.h
mmu_ps3.c	New pmap implementation for 64-bit PowerPC processors. The main focus of	2015-02-24 21:37:20 +00:00
ohci_ps3.c	Add 64-bit DMA support in the XHCI controller driver.	2015-01-05 20:22:18 +00:00
platform_ps3.c	Use FDT properties to identify a PS3 if present.	2015-01-05 01:05:35 +00:00
ps3_syscons.c	Add support for USB display link adapters to the FB and VT drivers.	2015-03-07 20:45:15 +00:00
ps3-hv-asm.awk
ps3-hv-header.awk
ps3-hvcall.h
ps3-hvcall.master
ps3-hvcall.S
ps3bus.c
ps3bus.h
ps3cdrom.c
ps3disk.c
ps3pic.c	Repair some races in IPI handling:	2014-05-12 02:56:27 +00:00