4438ca8fc5
in Freescale system-on-chip devices. The following algorithms and schemes are currently supported: - 3DES, AES, DES - MD5, SHA1, SHA256, SHA384, SHA512 Reviewed by: philip Obtained from: Freescale, Semihalf
48 lines
1.8 KiB
C
48 lines
1.8 KiB
C
/*-
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* Copyright (c) 2006 Juniper Networks
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _MACHINE_OCPBUS_H_
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#define _MACHINE_OCPBUS_H_
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#define OCPBUS_IVAR_DEVTYPE 1
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#define OCPBUS_IVAR_CLOCK 2
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#define OCPBUS_IVAR_HWUNIT 3
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#define OCPBUS_IVAR_MACADDR 4
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/* Device types. */
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#define OCPBUS_DEVTYPE_PIC 1
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#define OCPBUS_DEVTYPE_TSEC 2
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#define OCPBUS_DEVTYPE_UART 3
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#define OCPBUS_DEVTYPE_QUICC 4
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#define OCPBUS_DEVTYPE_PCIB 5
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#define OCPBUS_DEVTYPE_LBC 6
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#define OCPBUS_DEVTYPE_I2C 7
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#define OCPBUS_DEVTYPE_SEC 8
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#endif /* _MACHINE_OCPBUS_H_ */
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