cem a15dada94b pmap_invalidate_range: For very large ranges, flush the whole TLB ... Typical TLBs have 40-512 entries available. At some point, iterating every single page in a requested invalidation range and issuing invlpg on it is more expensive than flushing the TLB and allowing it to reload on demand. Broadwell CPUs have 1536 L2 TLB entries, so I've picked the arbitrary number 4096 entries as a hueristic at which point we flush TLB rather than invalidating every single potential page. Reviewed by: alc Feedback from: jhb, kib MFC notes: Depends on r291688 Sponsored by: EMC / Isilon Storage Division Differential Revision: https://reviews.freebsd.org/D4280		2015-12-06 17:39:13 +00:00
..
acpica	If x86 CPU implementation of the MWAIT instruction reasonably	2015-05-09 12:28:48 +00:00
bios	Pull in r267961 and r267973 again. Fix for issues reported will follow.	2014-06-28 03:56:17 +00:00
conf	Disconnect iBCS2 emulator from the build. The ibcs2 option, the build	2015-11-28 08:31:32 +00:00
i386	pmap_invalidate_range: For very large ranges, flush the whole TLB	2015-12-06 17:39:13 +00:00
ibcs2	Replace struct filedesc argument in getvnode with struct thread	2015-06-16 13:09:18 +00:00
include	For amd64 non-PCID machines, and for i386 machines with support for	2015-12-03 11:14:14 +00:00
isa	Convert between abridged (from FXSAVE) and unabridged (from FSAVE)	2015-07-10 09:20:13 +00:00
linux	Remove sv_prepsyscall, sv_sigsize and sv_sigtbl members of the struct	2015-11-28 08:49:07 +00:00
pci	Remove support for Xen PV domU kernels. Support for HVM domU kernels	2015-04-30 15:48:48 +00:00
svr4	MFamd64: Move extern declaration of _ucodesel and _udatasel to	2014-11-02 21:40:32 +00:00
xbox	After r261980, the local ptr variable in xbox_init() is no longer used,	2014-02-16 22:48:36 +00:00
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