10fe024e74
Approved by: hm
425 lines
9.8 KiB
C
425 lines
9.8 KiB
C
/*
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* Copyright (c) 1997, 1998 Hellmuth Michaelis. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*---------------------------------------------------------------------------
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*
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* i4b_isic_pci.c - PCI bus interface
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* ==================================
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*
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* $Id: i4b_isic_pci.c,v 1.1 1998/12/27 21:46:46 phk Exp $
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*
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* last edit-date: [Sat Dec 5 18:24:36 1998]
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*
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*---------------------------------------------------------------------------*/
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#include "isic.h"
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#if defined(__FreeBSD__)
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#include "opt_i4b.h"
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#include "pci.h"
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#endif
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#if (NISIC > 0) && (NPCI > 0)
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#include <sys/param.h>
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#include <sys/kernel.h>
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#include <sys/systm.h>
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#include <sys/mbuf.h>
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#include <sys/socket.h>
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#include <net/if.h>
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#ifdef __FreeBSD__
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#if __FreeBSD__ >= 3
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#include <sys/ioccom.h>
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#else
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#include <sys/ioctl.h>
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#endif
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#include <machine/clock.h>
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#include <i386/isa/isa_device.h>
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#include <pci/pcireg.h>
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#include <pci/pcivar.h>
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#else
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#include <machine/bus.h>
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#include <sys/device.h>
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#endif
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#ifdef __FreeBSD__
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#include <machine/i4b_debug.h>
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#include <machine/i4b_ioctl.h>
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#else
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#include <i4b/i4b_debug.h>
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#include <i4b/i4b_ioctl.h>
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#endif
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#include <i4b/include/i4b_global.h>
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#include <i4b/include/i4b_l1l2.h>
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#include <i4b/include/i4b_mbuf.h>
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#include <i4b/layer1/i4b_l1.h>
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#include <i4b/layer1/i4b_ipac.h>
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#include <i4b/layer1/i4b_isac.h>
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#include <i4b/layer1/i4b_hscx.h>
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#define PCI_QS1000_ID 0x10001048
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#define MEM0_MAPOFF 0
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#define PORT0_MAPOFF 4
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#define PORT1_MAPOFF 12
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static const char* i4b_pci_probe(pcici_t tag, pcidi_t type);
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static void i4b_pci_attach(pcici_t config_id, int unit);
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static int isic_pciattach(int unit, u_long type, u_int iobase1, u_int iobase2);
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static u_long i4b_pci_count = 0;
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static struct pci_device i4b_pci_driver = {
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"isic",
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i4b_pci_probe,
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i4b_pci_attach,
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&i4b_pci_count,
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NULL
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};
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DATA_SET (pcidevice_set, i4b_pci_driver);
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static void isic_pci_intr_sc(struct isic_softc *sc);
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/*---------------------------------------------------------------------------*
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* PCI probe routine
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*---------------------------------------------------------------------------*/
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static const char *
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i4b_pci_probe(pcici_t tag, pcidi_t type)
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{
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switch(type)
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{
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case PCI_QS1000_ID:
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return("ELSA QuickStep 1000pro PCI ISDN adaptor");
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break;
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default:
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if(bootverbose)
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printf("i4b_pci_probe: unknown PCI type %ul!\n", (u_int)type);
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return(NULL);
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}
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return(NULL);
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}
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/*---------------------------------------------------------------------------*
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* PCI attach routine
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*---------------------------------------------------------------------------*/
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static void
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i4b_pci_attach(pcici_t config_id, int unit)
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{
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unsigned short iobase1;
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unsigned short iobase2;
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unsigned long type;
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struct isic_softc *sc = &isic_sc[unit];
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if(unit != next_isic_unit)
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{
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printf("i4b_pci_attach: Error: new unit (%d) != next_isic_unit (%d)!\n", unit, next_isic_unit);
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return;
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}
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if(!(pci_map_port(config_id, PCI_MAP_REG_START+PORT0_MAPOFF, &iobase1)))
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{
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printf("i4b_pci_attach: pci_map_port 1 failed!\n");
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return;
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}
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if(!(pci_map_port(config_id, PCI_MAP_REG_START+PORT1_MAPOFF, &iobase2)))
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{
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printf("i4b_pci_attach: pci_map_port 2 failed!\n");
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return;
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}
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if(bootverbose)
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printf("i4b_pci_attach: unit %d, port0 0x%x, port1 0x%x\n", unit, iobase1, iobase2);
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type = pci_conf_read(config_id, PCI_ID_REG);
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if((isic_pciattach(unit, type, iobase1, iobase2)) == 0)
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return;
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if(!(pci_map_int(config_id, (void *)isic_pci_intr_sc, (void *)sc, &net_imask)))
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return;
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}
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/*---------------------------------------------------------------------------*
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* isic - pci device driver attach routine
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*---------------------------------------------------------------------------*/
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static int
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isic_pciattach(int unit, u_long type, u_int iobase1, u_int iobase2)
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{
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int ret = 0;
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struct isic_softc *sc = &isic_sc[unit];
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static char *ISACversion[] = {
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"2085 Version A1/A2 or 2086/2186 Version 1.1",
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"2085 Version B1",
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"2085 Version B2",
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"2085 Version V2.3 (B3)",
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"Unknown Version"
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};
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static char *HSCXversion[] = {
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"82525 Version A1",
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"Unknown (0x01)",
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"82525 Version A2",
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"Unknown (0x03)",
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"82525 Version A3",
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"82525 or 21525 Version 2.1",
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"Unknown Version"
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};
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switch(type)
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{
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#ifdef ELSA_QS1PCI
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case PCI_QS1000_ID:
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ret = isic_attach_Eqs1pp(unit, iobase1, iobase2);
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break;
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#endif
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default:
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break;
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}
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if(ret == 0)
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return(ret);
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sc->sc_isac_version = 0;
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sc->sc_hscx_version = 0;
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sc->sc_unit = unit;
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if(sc->sc_ipac)
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{
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ret = IPAC_READ(IPAC_ID);
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switch(ret)
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{
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case 0x01:
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printf("isic%d: IPAC PSB2115 Version 1.1\n", unit);
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break;
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default:
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printf("isic%d: Error, IPAC version %d unknown!\n",
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unit, ret);
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return(0);
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break;
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}
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}
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else
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{
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sc->sc_isac_version = ((ISAC_READ(I_RBCH)) >> 5) & 0x03;
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switch(sc->sc_isac_version)
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{
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case ISAC_VA:
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case ISAC_VB1:
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case ISAC_VB2:
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case ISAC_VB3:
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printf("isic%d: ISAC %s (IOM-%c)\n",
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unit,
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ISACversion[sc->sc_isac_version],
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sc->sc_bustyp == BUS_TYPE_IOM1 ? '1' : '2');
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break;
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default:
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printf("isic%d: Error, ISAC version %d unknown!\n",
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unit, sc->sc_isac_version);
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return(0);
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break;
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}
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sc->sc_hscx_version = HSCX_READ(0, H_VSTR) & 0xf;
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switch(sc->sc_hscx_version)
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{
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case HSCX_VA1:
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case HSCX_VA2:
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case HSCX_VA3:
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case HSCX_V21:
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printf("isic%d: HSCX %s\n",
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unit,
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HSCXversion[sc->sc_hscx_version]);
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break;
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default:
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printf("isic%d: Error, HSCX version %d unknown!\n",
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unit, sc->sc_hscx_version);
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return(0);
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break;
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}
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}
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/* ISAC setup */
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isic_isac_init(sc);
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/* HSCX setup */
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isic_bchannel_setup(sc->sc_unit, HSCX_CH_A, BPROT_NONE, 0);
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isic_bchannel_setup(sc->sc_unit, HSCX_CH_B, BPROT_NONE, 0);
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/* setup linktab */
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isic_init_linktab(sc);
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/* set trace level */
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sc->sc_trace = TRACE_OFF;
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sc->sc_state = ISAC_IDLE;
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sc->sc_ibuf = NULL;
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sc->sc_ib = NULL;
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sc->sc_ilen = 0;
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sc->sc_obuf = NULL;
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sc->sc_op = NULL;
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sc->sc_ol = 0;
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sc->sc_freeflag = 0;
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sc->sc_obuf2 = NULL;
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sc->sc_freeflag2 = 0;
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#if defined(__FreeBSD__) && __FreeBSD__ >=3
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callout_handle_init(&sc->sc_T3_callout);
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callout_handle_init(&sc->sc_T4_callout);
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#endif
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/* init higher protocol layers */
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MPH_Status_Ind(sc->sc_unit, STI_ATTACH, sc->sc_cardtyp);
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next_isic_unit++;
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return(1);
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}
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/*---------------------------------------------------------------------------*
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* isic - PCI device driver interrupt routine
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*---------------------------------------------------------------------------*/
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static void
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isic_pci_intr_sc(struct isic_softc *sc)
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{
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if(sc->sc_ipac == 0) /* HSCX/ISAC interupt routine */
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{
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register u_char hscx_irq_stat;
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register u_char isac_irq_stat;
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for(;;)
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{
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/* get hscx irq status from hscx b ista */
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hscx_irq_stat =
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HSCX_READ(HSCX_CH_B, H_ISTA) & ~HSCX_B_IMASK;
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/* get isac irq status */
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isac_irq_stat = ISAC_READ(I_ISTA);
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/* do as long as there are pending irqs in the chips */
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if(!hscx_irq_stat && !isac_irq_stat)
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break;
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if(hscx_irq_stat & (HSCX_ISTA_RME | HSCX_ISTA_RPF |
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HSCX_ISTA_RSC | HSCX_ISTA_XPR |
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HSCX_ISTA_TIN | HSCX_ISTA_EXB))
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{
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isic_hscx_irq(sc, hscx_irq_stat,
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HSCX_CH_B,
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hscx_irq_stat & HSCX_ISTA_EXB);
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}
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if(hscx_irq_stat & (HSCX_ISTA_ICA | HSCX_ISTA_EXA))
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{
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isic_hscx_irq(sc,
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HSCX_READ(HSCX_CH_A, H_ISTA) & ~HSCX_A_IMASK,
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HSCX_CH_A,
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hscx_irq_stat & HSCX_ISTA_EXA);
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}
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if(isac_irq_stat)
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{ /* isac handler */
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isic_isac_irq(sc, isac_irq_stat);
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}
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}
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HSCX_WRITE(0, H_MASK, 0xff);
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ISAC_WRITE(I_MASK, 0xff);
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HSCX_WRITE(1, H_MASK, 0xff);
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DELAY(100);
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HSCX_WRITE(0, H_MASK, HSCX_A_IMASK);
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ISAC_WRITE(I_MASK, ISAC_IMASK);
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HSCX_WRITE(1, H_MASK, HSCX_B_IMASK);
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}
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else /* IPAC interrupt routine */
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{
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register u_char ipac_irq_stat;
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for(;;)
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{
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/* get global irq status */
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ipac_irq_stat = (IPAC_READ(IPAC_ISTA)) & 0x3f;
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/* do as long as there are pending irqs in the chip */
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if(!ipac_irq_stat)
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break;
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/* check hscx a */
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if(ipac_irq_stat & (IPAC_ISTA_ICA | IPAC_ISTA_EXA))
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{
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/* HSCX A interrupt */
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isic_hscx_irq(sc, HSCX_READ(HSCX_CH_A, H_ISTA),
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HSCX_CH_A,
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ipac_irq_stat & IPAC_ISTA_EXA);
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}
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if(ipac_irq_stat & (IPAC_ISTA_ICB | IPAC_ISTA_EXB))
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{
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/* HSCX B interrupt */
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isic_hscx_irq(sc, HSCX_READ(HSCX_CH_B, H_ISTA),
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HSCX_CH_B,
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ipac_irq_stat & IPAC_ISTA_EXB);
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}
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if(ipac_irq_stat & (IPAC_ISTA_ICD | IPAC_ISTA_EXD))
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{
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/* ISAC interrupt */
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isic_isac_irq(sc, ISAC_READ(I_ISTA));
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}
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}
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IPAC_WRITE(IPAC_MASK, 0xff);
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DELAY(50);
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IPAC_WRITE(IPAC_MASK, 0xc0);
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}
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}
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#endif /* (NISIC > 0) && (NPCI > 0) */
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