426cd972f1
when we bring in bhyve support. Submitted by: Mihai Carabas <mihai.carabas AT gmail.com> Differential Revision: https://reviews.freebsd.org/D10045
88 lines
2.6 KiB
ArmAsm
88 lines
2.6 KiB
ArmAsm
/*
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* Copyright (C) 2015 Mihai Carabas <mihai.carabas@gmail.com>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include "assym.s"
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#include <sys/syscall.h>
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#include <machine/asm.h>
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#include <machine/asmacros.h>
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#include <machine/armreg.h>
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__FBSDID("$FreeBSD$");
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#if __ARM_ARCH >= 7
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#if defined(__ARM_ARCH_7VE__) || defined(__clang__)
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.arch_extension virt
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#endif
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ASENTRY_NP(hypervisor_stub_vect_install)
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/* Install hypervisor stub vectors. */
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adr r0, hypervisor_stub_vect
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mcr CP15_HVBAR(r0)
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/* Disable all the traps in the hypervisor. */
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mov r0, #0
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mcr CP15_HCR(r0)
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mcr CP15_HCPTR(r0)
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mcr CP15_HSTR(r0)
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mcr CP15_HSCTLR(r0)
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/* Don't disable access to perf-mon from PL0,1 and preserve HPMN. */
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mrc CP15_HDCR(r0)
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and r0, #(ARM_CP15_HDCR_HPMN)
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/* Caller implicit instruction barrier in the ERET. */
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mcr CP15_HDCR(r0)
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RET
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END(hypervisor_stub_vect_install)
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ASENTRY_NP(hypervisor_stub_trap)
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/*
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* If the first parameter is -1 than return the
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* exception vector (HVBAR), otherwise set it to
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* the value of it.
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*/
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cmp r0, #-1
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mrceq CP15_HVBAR(r0)
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mcrne CP15_HVBAR(r0)
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ERET
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END(hypervisor_stub_trap)
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.globl hypervisor_stub_vect
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.align 5
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_C_LABEL(hypervisor_stub_vect):
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.word 0 /* Reset */
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.word 0 /* undev */
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.word 0 /* SMC */
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.word 0 /* PABT */
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.word 0 /* DABT */
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b hypervisor_stub_trap /* HYP-Mode */
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.word 0 /* FIQ */
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.word 0 /* IRQ */
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#endif /* __ARM_ARCH >= 7 */
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