freebsd-skq/sys/powerpc/aim
Justin Hibbits a57ec59f9c powerpc64/pmap: NUMA-ize the page pv lock pool to reduce contention
It was found during building llvm that the page pv lock pool was seeing very
high contention.  Since the pmap is already NUMA aware, it was surmised that
the domains were referencing similar pages in the different domains.  This
reduces contention to the point of noise in a lockstat(8) run (~51% down to
under 5%), reducing build times by up to 20%.

This doesn't do a perfect domain alignment, just a best-guess based on
hardware available, that the domain is roughly specified in the upper bits
of the PA.  Trying to be more clever would more than likely result in
reduced performance just on the work needed.

MFC after:	2 weeks
2019-05-18 11:14:43 +00:00
..
aim_machdep.c powerpc: Add POWER8NVL definition 2019-04-27 02:33:49 +00:00
locore32.S powerpc64: Add a trap stack area 2019-02-04 16:02:03 +00:00
locore64.S powerpc64: Add a trap stack area 2019-02-04 16:02:03 +00:00
locore.S Add a kdb show command to print arbitrary SPRs on PowerPC 2016-08-13 18:46:49 +00:00
mmu_oea64.c powerpc64/pmap: NUMA-ize the page pv lock pool to reduce contention 2019-05-18 11:14:43 +00:00
mmu_oea64.h Final fix for alignment issues with the page table first patched with 2018-05-14 04:00:52 +00:00
mmu_oea.c vm_wait() rework. 2018-02-20 10:13:13 +00:00
moea64_if.m
moea64_native.c powerpc64: Micro-optimize moea64 native pmap tlbie 2019-03-26 02:53:35 +00:00
mp_cpudep.c powerpc: Initialize the Hardware Interrupt Offset Register (HIOR) earlier for ppc970 2019-05-10 19:36:14 +00:00
slb.c Move the powerpc64 direct map base address from zero to high memory. This 2018-03-07 17:08:07 +00:00
trap_subr32.S powerpc: Add a couple missing isyncs 2019-04-24 02:51:58 +00:00
trap_subr64.S powerpc64: Use medium code model in asm files for TOC references 2019-03-29 02:38:30 +00:00