113 lines
3.1 KiB
C
113 lines
3.1 KiB
C
/*
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* Copyright (c) 1996, by Steve Passe
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. The name of the developer may NOT be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $Id: mpapic.h,v 1.4 1997/07/28 03:40:09 smp Exp smp $
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*/
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#ifndef _MACHINE_MPAPIC_H_
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#define _MACHINE_MPAPIC_H_
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#include <i386/isa/icu.h>
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#include <i386/include/apic.h>
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/* number of busses */
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#if !defined(NBUS)
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# define NBUS 4
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#endif /* NBUS */
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/* total number of APIC INTs, including SHARED INTs */
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#if !defined(NINTR)
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#define NINTR 48
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#endif /* NINTR */
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/*
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* Size of APIC ID list.
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* Also used a MAX size of various other arrays.
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*/
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#define NAPICID 16
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/* these don't really belong in here... */
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enum busTypes {
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CBUS = 1,
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CBUSII = 2,
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EISA = 3,
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ISA = 6,
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PCI = 13,
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XPRESS = 18,
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MAX_BUSTYPE = 18,
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UNKNOWN_BUSTYPE = 0xff
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};
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/*
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* the physical/logical APIC ID management macors
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*/
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#define CPU_TO_ID(CPU) (cpu_num_to_apic_id[CPU])
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#define ID_TO_CPU(ID) (apic_id_to_logical[ID])
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#define IO_TO_ID(IO) (io_num_to_apic_id[IO])
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#define ID_TO_IO(ID) (apic_id_to_logical[ID])
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/*
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* send an IPI INTerrupt containing 'vector' to CPUs in 'targetMap'
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* 'targetMap' is a bitfiled of length 14,
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* APIC #0 == bit 0, ..., APIC #14 == bit 14
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* NOTE: these are LOGICAL APIC IDs
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*/
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static __inline int
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selected_procs_ipi(int targetMap, int vector)
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{
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return selected_apic_ipi(targetMap, vector, APIC_DELMODE_FIXED);
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}
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/*
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* send an IPI INTerrupt containing 'vector' to all CPUs, including myself
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*/
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static __inline int
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all_procs_ipi(int vector)
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{
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return apic_ipi(APIC_DEST_ALLISELF, vector, APIC_DELMODE_FIXED);
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}
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/*
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* send an IPI INTerrupt containing 'vector' to all CPUs EXCEPT myself
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*/
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static __inline int
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all_but_self_ipi(int vector)
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{
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return apic_ipi(APIC_DEST_ALLESELF, vector, APIC_DELMODE_FIXED);
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}
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/*
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* send an IPI INTerrupt containing 'vector' to myself
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*/
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static __inline int
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self_ipi(int vector)
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{
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return apic_ipi(APIC_DEST_SELF, vector, APIC_DELMODE_FIXED);
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}
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#endif /* _MACHINE_MPAPIC_H */
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