9accef3f0f
Major changes:
- Add i219/i219(2) hardware support. (Found on Skylake generation and newer
chipsets.)
- Further to the last Skylake support diff, this one also includes support for
the Lewisburg chipset (i219(3)).
- Add a workaround to an igb hardware errata.
All 1G server products need to have IPv6 extension header parsing turned off.
This should be listed in the specification updates for current 1G server
products, e.g. for i350 it's errata #37 in this document:
http://www.intel.com/content/dam/www/public/us/en/documents/specification-updates/ethernet-controller-i350-spec-update.pdf
- Avoton (i354) PHY errata workaround added
And a bunch of minor fixes, as well as #defines for things that the current
em(4)/igb(4) drivers don't implement.
Differential Revision: https://reviews.freebsd.org/D3162
Reviewed by: sbruno, marius, gnn
Approved by: gnn
MFC after: 2 weeks
Sponsored by: Intel Corporation
81 lines
3.6 KiB
C
81 lines
3.6 KiB
C
/******************************************************************************
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Copyright (c) 2001-2015, Intel Corporation
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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3. Neither the name of the Intel Corporation nor the names of its
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contributors may be used to endorse or promote products derived from
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this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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******************************************************************************/
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/*$FreeBSD$*/
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#ifndef _E1000_NVM_H_
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#define _E1000_NVM_H_
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struct e1000_pba {
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u16 word[2];
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u16 *pba_block;
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};
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void e1000_init_nvm_ops_generic(struct e1000_hw *hw);
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s32 e1000_null_read_nvm(struct e1000_hw *hw, u16 a, u16 b, u16 *c);
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void e1000_null_nvm_generic(struct e1000_hw *hw);
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s32 e1000_null_led_default(struct e1000_hw *hw, u16 *data);
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s32 e1000_null_write_nvm(struct e1000_hw *hw, u16 a, u16 b, u16 *c);
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s32 e1000_acquire_nvm_generic(struct e1000_hw *hw);
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s32 e1000_poll_eerd_eewr_done(struct e1000_hw *hw, int ee_reg);
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s32 e1000_read_mac_addr_generic(struct e1000_hw *hw);
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s32 e1000_read_pba_string_generic(struct e1000_hw *hw, u8 *pba_num,
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u32 pba_num_size);
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s32 e1000_read_pba_length_generic(struct e1000_hw *hw, u32 *pba_num_size);
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s32 e1000_read_pba_raw(struct e1000_hw *hw, u16 *eeprom_buf,
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u32 eeprom_buf_size, u16 max_pba_block_size,
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struct e1000_pba *pba);
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s32 e1000_write_pba_raw(struct e1000_hw *hw, u16 *eeprom_buf,
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u32 eeprom_buf_size, struct e1000_pba *pba);
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s32 e1000_get_pba_block_size(struct e1000_hw *hw, u16 *eeprom_buf,
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u32 eeprom_buf_size, u16 *pba_block_size);
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s32 e1000_read_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);
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s32 e1000_read_nvm_microwire(struct e1000_hw *hw, u16 offset,
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u16 words, u16 *data);
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s32 e1000_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words,
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u16 *data);
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s32 e1000_valid_led_default_generic(struct e1000_hw *hw, u16 *data);
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s32 e1000_validate_nvm_checksum_generic(struct e1000_hw *hw);
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s32 e1000_write_nvm_microwire(struct e1000_hw *hw, u16 offset,
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u16 words, u16 *data);
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s32 e1000_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words,
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u16 *data);
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s32 e1000_update_nvm_checksum_generic(struct e1000_hw *hw);
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void e1000_stop_nvm(struct e1000_hw *hw);
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void e1000_release_nvm_generic(struct e1000_hw *hw);
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#define E1000_STM_OPCODE 0xDB00
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#endif
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