d043c56453
This involves significant changes to the mps(4) driver, but is not a complete rewrite. Some of the changes in this version of the driver: - Integrated RAID (IR) support. - Support for WarpDrive controllers. - Support for SCSI protection information (EEDP). - Support for TLR (Transport Level Retries), needed for tape drives. - Improved error recovery code. - ioctl interface compatible with LSI utilities. mps.4: Update the mps(4) driver man page somewhat for the driver changes. The list of supported hardware still needs to be updated to reflect the full list of supported cards. conf/files: Add the new driver files. mps/mpi/*: Updated version of the MPI header files, with a BSD style copyright. mps/*: See above for a description of the new driver features. modules/mps/Makefile: Add the new mps(4) driver files. Submitted by: Kashyap Desai <Kashyap.Desai@lsi.com> Reviewed by: ken MFC after: 1 week
393 lines
11 KiB
C
393 lines
11 KiB
C
/*-
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* Copyright (c) 2009 Yahoo! Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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/* PCI/PCI-X/PCIe bus interface for the LSI MPT2 controllers */
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/* TODO Move headers to mpsvar */
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/bus.h>
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#include <sys/conf.h>
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#include <sys/malloc.h>
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#include <sys/sysctl.h>
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#include <sys/uio.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <sys/rman.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pci_private.h>
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#include <dev/mps/mpi/mpi2_type.h>
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#include <dev/mps/mpi/mpi2.h>
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#include <dev/mps/mpi/mpi2_ioc.h>
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#include <dev/mps/mpi/mpi2_cnfg.h>
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#include <dev/mps/mpi/mpi2_tool.h>
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#include <sys/queue.h>
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#include <sys/kthread.h>
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#include <dev/mps/mps_ioctl.h>
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#include <dev/mps/mpsvar.h>
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static int mps_pci_probe(device_t);
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static int mps_pci_attach(device_t);
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static int mps_pci_detach(device_t);
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static int mps_pci_suspend(device_t);
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static int mps_pci_resume(device_t);
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static void mps_pci_free(struct mps_softc *);
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static int mps_alloc_msix(struct mps_softc *sc, int msgs);
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static int mps_alloc_msi(struct mps_softc *sc, int msgs);
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static device_method_t mps_methods[] = {
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DEVMETHOD(device_probe, mps_pci_probe),
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DEVMETHOD(device_attach, mps_pci_attach),
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DEVMETHOD(device_detach, mps_pci_detach),
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DEVMETHOD(device_suspend, mps_pci_suspend),
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DEVMETHOD(device_resume, mps_pci_resume),
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DEVMETHOD_END
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};
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static driver_t mps_pci_driver = {
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"mps",
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mps_methods,
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sizeof(struct mps_softc)
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};
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static devclass_t mps_devclass;
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DRIVER_MODULE(mps, pci, mps_pci_driver, mps_devclass, 0, 0);
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struct mps_ident {
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uint16_t vendor;
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uint16_t device;
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uint16_t subvendor;
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uint16_t subdevice;
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u_int flags;
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const char *desc;
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} mps_identifiers[] = {
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{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2004,
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0xffff, 0xffff, 0, "LSI SAS2004" },
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{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2008,
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0xffff, 0xffff, 0, "LSI SAS2008" },
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{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2108_1,
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0xffff, 0xffff, 0, "LSI SAS2108" },
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{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2108_2,
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0xffff, 0xffff, 0, "LSI SAS2108" },
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{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2108_3,
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0xffff, 0xffff, 0, "LSI SAS2108" },
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{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2116_1,
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0xffff, 0xffff, 0, "LSI SAS2116" },
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{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2116_2,
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0xffff, 0xffff, 0, "LSI SAS2116" },
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{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_1,
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0xffff, 0xffff, 0, "LSI SAS2208" },
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{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_2,
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0xffff, 0xffff, 0, "LSI SAS2208" },
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{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_3,
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0xffff, 0xffff, 0, "LSI SAS2208" },
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{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_4,
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0xffff, 0xffff, 0, "LSI SAS2208" },
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{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_5,
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0xffff, 0xffff, 0, "LSI SAS2208" },
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{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_6,
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0xffff, 0xffff, 0, "LSI SAS2208" },
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{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_1,
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0xffff, 0xffff, 0, "LSI SAS2308" },
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// Add Customer specific vender/subdevice id before generic
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// (0xffff) vender/subdevice id.
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{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2,
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0x8086, 0x3516, 0, "Intel(R) Integrated RAID Module RMS25JB080" },
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{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2,
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0x8086, 0x3517, 0, "Intel(R) Integrated RAID Module RMS25JB040" },
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{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2,
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0x8086, 0x3518, 0, "Intel(R) Integrated RAID Module RMS25KB080" },
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{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2,
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0x8086, 0x3519, 0, "Intel(R) Integrated RAID Module RMS25KB040" },
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{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2,
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0xffff, 0xffff, 0, "LSI SAS2308" },
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{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_3,
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0xffff, 0xffff, 0, "LSI SAS2308" },
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{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SSS6200,
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0xffff, 0xffff, MPS_FLAGS_WD_AVAILABLE, "LSI SSS6200" },
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{ 0, 0, 0, 0, 0, NULL }
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};
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static struct mps_ident *
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mps_find_ident(device_t dev)
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{
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struct mps_ident *m;
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for (m = mps_identifiers; m->vendor != 0; m++) {
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if (m->vendor != pci_get_vendor(dev))
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continue;
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if (m->device != pci_get_device(dev))
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continue;
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if ((m->subvendor != 0xffff) &&
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(m->subvendor != pci_get_subvendor(dev)))
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continue;
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if ((m->subdevice != 0xffff) &&
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(m->subdevice != pci_get_subdevice(dev)))
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continue;
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return (m);
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}
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return (NULL);
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}
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static int
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mps_pci_probe(device_t dev)
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{
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struct mps_ident *id;
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if ((id = mps_find_ident(dev)) != NULL) {
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device_set_desc(dev, id->desc);
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return (BUS_PROBE_VENDOR);
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}
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return (ENXIO);
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}
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static int
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mps_pci_attach(device_t dev)
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{
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struct mps_softc *sc;
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struct mps_ident *m;
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uint16_t command;
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int error;
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sc = device_get_softc(dev);
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bzero(sc, sizeof(*sc));
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sc->mps_dev = dev;
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m = mps_find_ident(dev);
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sc->mps_flags = m->flags;
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/* Twiddle basic PCI config bits for a sanity check */
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command = pci_read_config(dev, PCIR_COMMAND, 2);
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command |= PCIM_CMD_BUSMASTEREN;
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pci_write_config(dev, PCIR_COMMAND, command, 2);
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command = pci_read_config(dev, PCIR_COMMAND, 2);
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if ((command & PCIM_CMD_BUSMASTEREN) == 0) {
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device_printf(dev, "Cannot enable PCI busmaster\n");
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return (ENXIO);
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}
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if ((command & PCIM_CMD_MEMEN) == 0) {
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device_printf(dev, "PCI memory window not available\n");
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return (ENXIO);
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}
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/* Allocate the System Interface Register Set */
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sc->mps_regs_rid = PCIR_BAR(1);
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if ((sc->mps_regs_resource = bus_alloc_resource_any(dev,
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SYS_RES_MEMORY, &sc->mps_regs_rid, RF_ACTIVE)) == NULL) {
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device_printf(dev, "Cannot allocate PCI registers\n");
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return (ENXIO);
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}
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sc->mps_btag = rman_get_bustag(sc->mps_regs_resource);
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sc->mps_bhandle = rman_get_bushandle(sc->mps_regs_resource);
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/* Allocate the parent DMA tag */
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if (bus_dma_tag_create( bus_get_dma_tag(dev), /* parent */
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1, 0, /* algnmnt, boundary */
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BUS_SPACE_MAXADDR, /* lowaddr */
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BUS_SPACE_MAXADDR, /* highaddr */
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NULL, NULL, /* filter, filterarg */
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BUS_SPACE_MAXSIZE_32BIT,/* maxsize */
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BUS_SPACE_UNRESTRICTED, /* nsegments */
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BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */
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0, /* flags */
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NULL, NULL, /* lockfunc, lockarg */
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&sc->mps_parent_dmat)) {
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device_printf(dev, "Cannot allocate parent DMA tag\n");
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mps_pci_free(sc);
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return (ENOMEM);
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}
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if ((error = mps_attach(sc)) != 0)
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mps_pci_free(sc);
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return (error);
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}
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int
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mps_pci_setup_interrupts(struct mps_softc *sc)
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{
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device_t dev;
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int i, error, msgs;
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dev = sc->mps_dev;
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error = ENXIO;
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if ((sc->disable_msix == 0) &&
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((msgs = pci_msix_count(dev)) >= MPS_MSI_COUNT))
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error = mps_alloc_msix(sc, MPS_MSI_COUNT);
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if ((error != 0) && (sc->disable_msi == 0) &&
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((msgs = pci_msi_count(dev)) >= MPS_MSI_COUNT))
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error = mps_alloc_msi(sc, MPS_MSI_COUNT);
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if (error != 0) {
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sc->mps_flags |= MPS_FLAGS_INTX;
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sc->mps_irq_rid[0] = 0;
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sc->mps_irq[0] = bus_alloc_resource_any(dev, SYS_RES_IRQ,
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&sc->mps_irq_rid[0], RF_SHAREABLE | RF_ACTIVE);
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if (sc->mps_irq[0] == NULL) {
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device_printf(dev, "Cannot allocate INTx interrupt\n");
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return (ENXIO);
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}
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error = bus_setup_intr(dev, sc->mps_irq[0],
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INTR_TYPE_BIO | INTR_MPSAFE, NULL, mps_intr, sc,
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&sc->mps_intrhand[0]);
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if (error)
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device_printf(dev, "Cannot setup INTx interrupt\n");
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} else {
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sc->mps_flags |= MPS_FLAGS_MSI;
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for (i = 0; i < MPS_MSI_COUNT; i++) {
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sc->mps_irq_rid[i] = i + 1;
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sc->mps_irq[i] = bus_alloc_resource_any(dev,
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SYS_RES_IRQ, &sc->mps_irq_rid[i], RF_ACTIVE);
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if (sc->mps_irq[i] == NULL) {
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device_printf(dev,
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"Cannot allocate MSI interrupt\n");
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return (ENXIO);
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}
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error = bus_setup_intr(dev, sc->mps_irq[i],
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INTR_TYPE_BIO | INTR_MPSAFE, NULL, mps_intr_msi,
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sc, &sc->mps_intrhand[i]);
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if (error) {
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device_printf(dev,
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"Cannot setup MSI interrupt %d\n", i);
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break;
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}
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}
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}
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return (error);
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}
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static int
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mps_pci_detach(device_t dev)
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{
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struct mps_softc *sc;
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int error;
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sc = device_get_softc(dev);
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if ((error = mps_free(sc)) != 0)
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return (error);
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mps_pci_free(sc);
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return (0);
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}
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static void
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mps_pci_free(struct mps_softc *sc)
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{
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int i;
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if (sc->mps_parent_dmat != NULL) {
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bus_dma_tag_destroy(sc->mps_parent_dmat);
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}
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if (sc->mps_flags & MPS_FLAGS_MSI) {
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for (i = 0; i < MPS_MSI_COUNT; i++) {
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if (sc->mps_irq[i] != NULL) {
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bus_teardown_intr(sc->mps_dev, sc->mps_irq[i],
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sc->mps_intrhand[i]);
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bus_release_resource(sc->mps_dev, SYS_RES_IRQ,
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sc->mps_irq_rid[i], sc->mps_irq[i]);
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}
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}
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pci_release_msi(sc->mps_dev);
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}
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if (sc->mps_flags & MPS_FLAGS_INTX) {
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bus_teardown_intr(sc->mps_dev, sc->mps_irq[0],
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sc->mps_intrhand[0]);
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bus_release_resource(sc->mps_dev, SYS_RES_IRQ,
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sc->mps_irq_rid[0], sc->mps_irq[0]);
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}
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if (sc->mps_regs_resource != NULL) {
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bus_release_resource(sc->mps_dev, SYS_RES_MEMORY,
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sc->mps_regs_rid, sc->mps_regs_resource);
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}
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return;
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}
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static int
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mps_pci_suspend(device_t dev)
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{
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return (EINVAL);
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}
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static int
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mps_pci_resume(device_t dev)
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{
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return (EINVAL);
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}
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static int
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mps_alloc_msix(struct mps_softc *sc, int msgs)
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{
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int error;
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error = pci_alloc_msix(sc->mps_dev, &msgs);
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return (error);
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}
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static int
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mps_alloc_msi(struct mps_softc *sc, int msgs)
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{
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int error;
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error = pci_alloc_msi(sc->mps_dev, &msgs);
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return (error);
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}
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int
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mps_pci_restore(struct mps_softc *sc)
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{
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struct pci_devinfo *dinfo;
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mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
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dinfo = device_get_ivars(sc->mps_dev);
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if (dinfo == NULL) {
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mps_dprint(sc, MPS_FAULT, "%s: NULL dinfo\n", __func__);
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return (EINVAL);
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}
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pci_cfg_restore(sc->mps_dev, dinfo);
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return (0);
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}
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